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xilinx/java/bbaexport.java:802: error: incompatible types: Design cannot be converted to Device
TimingModel tmg = new TimingModel(des);
^
xilinx/ja…
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I am trying the rapidwright jython using the interactive commandline format. The commands are working. But, when I put the commands in a script and run using `rapidwright jython script.py`, it gives t…
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The target is to be able to measure the performance of various routing algorithms done with the help of RapidWright.
However, first we need to integrate RW with the fpga-tool-perf.
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As part of the FPGA interchange work, RapidWright needs to be packaged for use. RapidWright has two parts, a closed portion and an open portion. The closed portion is not a permissible library, and …
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Xilinx/Chris has recently released RapidWright. Where does RS2 fit into this? Does it have a future or does RapidWright supplant it?
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Continuing to try RapidWright through command line- interactive mode:
I am trying to do tab complete and trying out various commands. But, how do I know what should be the arguments. For example, how…
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I tried to generate the DeviceResources file for Versal with `rapidwright DeviceResourcesExample xcvc1902`
but the output will always end with a NullPointerException:
```=========================…
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I encounter the following error (Null pointer exception) when running the first cell of the example exercise [BasicRouting.ipynb](https://github.com/clavin-xlnx/RapidWright-binder/blob/master/BasicRou…
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I have a couple contributions to make to the documentation found at http://www.rapidwright.io/docs/. Is there place to submit these contributions?