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IObundle
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iob-cache
Verilog Configurable Cache
MIT License
167
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simplify way of adding Verilog sources to VSRC list
#218
JDLopes
closed
2 years ago
0
feat(actions): continuous integration actions
#217
P-Miranda
closed
2 years ago
0
update lib submodule; update some tex files names
#216
codingUniv
closed
2 years ago
0
Update with latest LIB, preprocessed flow
#215
P-Miranda
closed
2 years ago
0
Add driver documentation support
#214
P-Miranda
closed
1 year ago
0
fix a variety of documentation generation issues
#213
codingUniv
closed
2 years ago
0
merges
#212
JDLopes
closed
2 years ago
0
a temporary solution to pass doc test
#211
codingUniv
closed
2 years ago
0
Ddr3
#210
jjts
closed
2 years ago
0
update tex files; update LIB submodule
#209
codingUniv
closed
2 years ago
0
fix some documentation generation issues; update LIB submodule
#208
codingUniv
closed
2 years ago
0
update LIB submodule
#207
codingUniv
closed
2 years ago
0
remove all simulation warnings
#206
JDLopes
closed
2 years ago
0
fix some documentation generation issues; update iob_cache_control.v
#205
codingUniv
closed
2 years ago
0
Integrate mkregs.conf to workflow
#204
P-Miranda
closed
2 years ago
0
use iob_cache_iob top module to generate the ug.pdf; fix some doc generation issues
#203
codingUniv
closed
2 years ago
0
a mkregs.conf to start with - to be refined
#202
codingUniv
closed
2 years ago
0
fix(doc): user guide generation
#201
P-Miranda
closed
2 years ago
0
refactor addr macros and some signals names
#200
codingUniv
closed
2 years ago
3
fix fpga synthesis warnings
#199
codingUniv
closed
2 years ago
0
fix fpga synthesis warnings
#198
codingUniv
closed
2 years ago
1
m_axi_rready_int assigned into always @* processes
#197
jjts
closed
2 years ago
2
update verilator testbench; update macros names
#196
codingUniv
closed
2 years ago
0
update lib submodule
#195
codingUniv
closed
2 years ago
0
update testbench files
#194
codingUniv
closed
2 years ago
0
more progress on documentation
#193
codingUniv
closed
2 years ago
0
update testbenches/tests
#192
codingUniv
closed
2 years ago
0
progress on simulation/test target
#191
codingUniv
closed
2 years ago
2
feat(actions): Add concurrency, cancel-in-progress
#190
P-Miranda
closed
2 years ago
0
fix(doc): Fix doc test
#189
P-Miranda
closed
2 years ago
0
update makefiles, simulation and fpga files to support the new build method
#188
codingUniv
closed
2 years ago
0
continue fpga files update to support the new build method
#187
codingUniv
closed
2 years ago
0
feat(actions): Add github action workflow
#186
P-Miranda
closed
2 years ago
0
add version to the hw; update sw; update verilator testbench; update LIB
#185
codingUniv
closed
2 years ago
0
update the user guide
#184
codingUniv
closed
2 years ago
0
update the user guide
#183
codingUniv
closed
2 years ago
0
update some figures of the user guide
#182
codingUniv
closed
2 years ago
0
specify the top module to be elaborated by icarus; update the verilog testbench
#181
codingUniv
closed
2 years ago
0
fix verilator simulation issue
#180
codingUniv
closed
2 years ago
0
add a verilog wrapper for verilator; update verilator testbench; update verilator Makefile
#179
codingUniv
closed
2 years ago
0
fix test target
#178
JDLopes
closed
2 years ago
0
rename sources
#177
jjts
closed
2 years ago
1
'x' data read from cache
#176
retrhelo
closed
2 years ago
11
Understanding the flow of iob-cache
#175
krritd23
closed
2 years ago
4
Possibility to perform Unit / functional tests on the verilated source files
#174
goforit19
closed
2 years ago
14
update iob_cache.v; update LIB submodule; update the user guide
#173
codingUniv
closed
2 years ago
0
Latest iob-cache does not compile due to warning being taken as error
#172
tejas190589
closed
2 years ago
3
update the user guide; update iob_cache.v; update LIB submodule
#171
codingUniv
closed
2 years ago
0
update LIB submodule
#170
codingUniv
closed
2 years ago
0
update MEM submodule
#169
JDLopes
closed
2 years ago
0
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