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UoB-HPC
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SimEng
The University of Bristol HPC Simulation Engine
https://uob-hpc.github.io/SimEng
Apache License 2.0
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[WIP] AArch64 Capstone Update / SME2 support
#429
FinnWilkinson
opened
1 week ago
0
-Wmaybe-uninitialized
#428
dANW34V3R
opened
1 week ago
0
Added cstdint header to Register.hh
#427
FinnWilkinson
opened
1 week ago
0
Compilation of SimEng fails on Manjaro Linux with GCC 14.2.1
#426
jandrovins
opened
1 week ago
4
ACFL23 Instruction Support
#425
JosephMoore25
opened
1 week ago
0
Update core model diagram
#424
ABenC377
opened
1 week ago
0
Gtest already imported with external LLVM
#423
JosephMoore25
opened
1 week ago
0
Bp update
#422
ABenC377
closed
2 weeks ago
0
Fixing LoopBuffer bug
#421
ABenC377
closed
1 month ago
0
Add Group Tests
#420
dANW34V3R
closed
1 month ago
0
Group Tests
#419
dANW34V3R
closed
2 weeks ago
0
Fix shift.value
#418
dANW34V3R
closed
2 months ago
0
Ensure Emulation core executes each micro-op to completion in 1 cycle
#417
FinnWilkinson
closed
2 months ago
1
Update issue templates
#416
FinnWilkinson
closed
2 months ago
1
Full SME(1) instruction support and STREAMING Groups
#415
FinnWilkinson
opened
3 months ago
1
Speculated assertions
#414
dANW34V3R
closed
2 months ago
1
Fix up random buffer value generation.
#413
tom91136
opened
3 months ago
0
Corrected RISC-V shift word instructions
#412
JosephMoore25
closed
3 months ago
0
Got error when run aarch64's binary with SimEng
#411
wkisme
opened
4 months ago
1
Set errno for simulated program
#410
dANW34V3R
opened
4 months ago
2
Version.hh
#409
dANW34V3R
opened
5 months ago
0
Warnings
#408
dANW34V3R
closed
3 months ago
3
Integrate BP update with in-order core
#407
ABenC377
opened
6 months ago
0
Incorporate new BP with in-order core
#406
ABenC377
closed
6 months ago
1
Regression Test issue when building SimEng : Unit_test SegFault
#405
elfmath
opened
6 months ago
1
Regression Test issue when building SimEng : "fcvtzu" ARM instruction
#404
elfmath
opened
6 months ago
1
Regression Test issue when building SimEng : getrandom syscall
#403
elfmath
opened
6 months ago
3
Fix Warnings
#402
dANW34V3R
closed
6 months ago
0
Updating Branch Predictors to replace hash-map with Fetch Target Queue
#401
ABenC377
closed
2 weeks ago
0
More registers required to rename all micro-ops than possible causes stalling
#400
JosephMoore25
opened
6 months ago
0
More micro-operations than ROB size causes stalling and a mem leak
#399
JosephMoore25
opened
6 months ago
0
Boolean Config Parameter Output
#398
dANW34V3R
opened
6 months ago
0
Fetch Unit Parameterisation
#397
dANW34V3R
opened
6 months ago
1
0.9.6 update
#396
jj16791
closed
6 months ago
0
AArch64 bitfieldManipulate bounds checking
#395
jj16791
closed
6 months ago
1
bitfieldManipulate uncaught bound restrictions
#394
jj16791
closed
6 months ago
0
Writeback Exceptions
#393
dANW34V3R
opened
6 months ago
0
Added conditional existence checks before early config option querying
#392
jj16791
closed
6 months ago
1
Uncaught config option errors
#391
jj16791
closed
6 months ago
0
Fix branch predictor flow (disappearing branches)
#390
ABenC377
opened
7 months ago
0
Instruction Class Clean-Up
#389
FinnWilkinson
closed
6 months ago
0
Fix broken tests caused by config-bug-fixes PR
#388
JosephMoore25
closed
7 months ago
0
Core class cleanup
#387
FinnWilkinson
closed
6 months ago
2
`SimEng/src/lib/Elf.cc` missing cstdio
#386
tom91136
closed
6 months ago
1
Architecture Class cleanup
#385
FinnWilkinson
closed
6 months ago
0
Handle case of not enough physical registers to rename micro-operations
#384
JosephMoore25
opened
7 months ago
0
st1w dirtied memory fix
#383
jj16791
closed
7 months ago
0
AArch64 ST1W test failure due to dirty page usage
#382
jj16791
closed
7 months ago
1
Added fix for returning a consistent nan value from a divide by zero
#381
jj16791
closed
7 months ago
0
Fix for NaN value from vector divide by 0 in AArch64 namespace
#380
jj16791
closed
7 months ago
1
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