ReSDMAC
Introduction
This project is has been a community effort with the PCB design by Jorgen Bilander and the code by Mike Taylor. It has been exercise in reverse engineering the Commodore SDMAC 390537 as found in the Amiga 3000
This project was started with nothing more that the descriptions of the SDMAC operations and from the Amiga 3000T Service manual, the WD33c93 Datasheets and some source code from the Amiga 3000 Linux scsi drivers.
Since then schematics for what appears to be the Rev 3(C) surfaced along with the original finite state machine descriptions:
SDMAC Documentation
To collate together the technical details of the SDMAC a markdown document has been created and is linked here
Pre-Production Board REV 1A
Timing Diagrams
Below are the VCD files output by the cocotb tests. these have been used to help verify the verilog code.
Acknowledgements
Thankyou to all the people who have helped with this project especially:
- Andy aka trixster1979 For the long term loan of a REV 4 SDMAC and dedicated testing of this on the AA3000+
- Chris Hooper aka CDH For providing various adaptor PCBs and breakout boards, also for writing the SDMAC test program.
- Jorgen Bilander For adapting the ReAgnus design to suit the SDMAC, and also for crating the ReSDMAC-devboard
- Matt Harlum Liv2 for checking over the my code and interpretation of the FSM schematics.
- Matthias Heinrichs For providing the Original Statemachine documentation
- Stefan Reinauer For his excellent work showcasing this at Amiwest 2024
- Stefan Skotte aka Screemo For the long term loan of a REV 2 SDMAC.
- Stephen Leary AKA Terriblefire For publishing the verilog code for his projects and inspiring me to learn verilog and take on this project way back in 2021
Honourable mentions
Others that have helped out with words of encouragement and general support.
This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.
