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pulp-platform
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riscv-dbg
RISC-V Debug Support for our PULP RISC-V Cores
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Timing of DMI req/rsp signals
#166
rswarbrick
opened
2 weeks ago
3
Reset state after trst_ni is wrong
#165
bluewww
opened
2 weeks ago
0
fix bugs for nrharts
#164
LuisDonatien
opened
3 weeks ago
1
Behaviour when JTAG clock is much faster than the system clock
#163
rswarbrick
opened
1 month ago
3
JTAG_TAP status can't be exited shift_ir, and traped in loop
#162
Lebattt
opened
1 month ago
0
dmcontrol.haltreq should always read as 0
#161
bcstrongx
opened
1 month ago
0
Misc fixes
#160
msfschaffner
closed
2 weeks ago
1
debug_rom: Fix non-resettable FF
#159
niwis
closed
7 months ago
1
Change default IDCODE
#158
bluewww
closed
8 months ago
0
Simulating with "VCS" and RiscV 64-bit toolchain.
#157
arash-vafaei
closed
11 months ago
1
Release 0.8.0
#156
bluewww
closed
1 year ago
0
dm_csrs: Fix W1C behavior of `sberror`
#155
andreaskurth
closed
1 year ago
1
`sberror` not clearing properly causes OpenOCD interoperability issues
#154
timothytrippel
closed
1 year ago
3
remote bitbang failing on halt command and sampling wrong IR capture
#153
ElectronicBatman
opened
1 year ago
0
Add `xprop_off` to Xprop-incompatible processes
#152
andreaskurth
closed
1 year ago
0
Fix debug ROM generator
#151
andreaskurth
closed
1 year ago
0
Change `unique case inside` to `unique case`
#150
andreaskurth
closed
1 year ago
1
questions about -rtos riscv in dm_compliance_test.cfg
#149
coderalai
opened
1 year ago
0
[Question]: OpenOCD Compliance Support
#148
sajjadahmed677
closed
1 year ago
1
Update CHANGELOG.md
#147
bluewww
closed
1 year ago
0
Misc Testbench Improvements
#146
bluewww
closed
1 year ago
0
[fix] Realign addresses to 64-bit
#145
creinwar
closed
1 year ago
1
[dm_mem] Addressing does not take strobes into account
#144
creinwar
closed
1 year ago
0
Prepare for release
#143
bluewww
closed
1 year ago
0
tb: Fix make vcsify
#142
bluewww
closed
1 year ago
0
Fix testbench build and test scripts
#141
bluewww
closed
1 year ago
0
dm_mem: Clear state of hart upon ndmreset
#140
andreaskurth
closed
1 year ago
0
dmi_jtag_tap: Bring all state to initial value in Test-Logic-Reset
#139
andreaskurth
closed
1 year ago
0
Fix DMI response when command or SBA are busy
#138
andreaskurth
closed
1 year ago
3
Assertion failure expected?
#137
dpetrisko
opened
1 year ago
2
dmi_jtag_tap: Use generic tech cells
#136
colluca
closed
1 year ago
0
Bender issue
#135
AlexChenIHP
closed
1 year ago
0
jtag_test: Add read_dmi_exp_backoff() and sba_read_double() functions
#134
colluca
closed
1 year ago
0
Fix remote_bitbang r/s/t/u-reset command implementations.
#133
epsilon537
closed
1 year ago
0
Port Travis CI to GitHub Actions workflow
#132
harsiddhdave44
closed
11 months ago
2
compile error: can't find module cdc_2phase_clearable
#131
damnsavage
opened
2 years ago
3
Re-align pins of dmi_bscane_tap with dmi_jtag_tap
#130
huettern
closed
2 years ago
0
[dm_sba] Implement SBA bad address error
#129
msfschaffner
closed
2 years ago
3
[sba] Add support for response timeout
#128
sriyerg
opened
2 years ago
0
[dm_csrs] Correct reset value of sbcs register
#127
msfschaffner
closed
2 years ago
0
Port .travis.yml to github actions
#126
bluewww
opened
2 years ago
0
Reintroduce Xilinx BSCANE2 tap
#125
bluewww
closed
2 years ago
1
Revert "Merge pull request #111 from pulp-platform/feature/dmi-bscane"
#124
bluewww
closed
2 years ago
0
Functional Resets and Async Reset Glitch Prevention
#123
meggiman
closed
2 years ago
4
DCSR cause field
#122
sriharich20
opened
2 years ago
0
Software Breakpoint
#121
sriharich20
closed
2 years ago
3
Fatal Glitching in Internal Asynchronous Reset Generation
#120
meggiman
closed
2 years ago
11
Feature request: Update DM according to debug spec V1.0.0
#119
silabs-oysteink
opened
2 years ago
0
ndmreset acknowledgement and resetting halted state in dm_mem
#118
GregAC
opened
2 years ago
1
openocd timeout occurs when trying to load elf file using command 'load_image'.
#117
nikhill-agnisys
closed
2 years ago
1
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