sinara-hw Sayma_AMC issues

sinara-hw / Sayma_AMC

AMC FPGA carrier board with FMC, dual SFP and RTM

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issues

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transmission line transformers compensation caps, capacitor jumpers, TCKC

#53 jordens closed 5 years ago
1
GC pins SMA/I2C/WR_REF

#52 jordens closed 5 years ago
11
JTAG chain ordering

#51 jordens closed 5 years ago
1
DNP ALT_PORT0 jumpers

#50 jordens closed 5 years ago
5
DNP FPGA daisy chain configuration loading resistors R200-R227

#49 jordens closed 5 years ago
1
MGTREFCLK uFL naming inconsistencies

#48 sbourdeauducq closed 5 years ago
1
add uFL connectors on MGTREFCLK1_226

#47 sbourdeauducq closed 5 years ago
1
scrap TI DCXO

#46 hartytp closed 5 years ago
1
supplying VCCBRAM with VCCINT from same rail

#45 gkasprow closed 5 years ago
2
MASTER SATA typo

#43 sbourdeauducq closed 5 years ago
1
ALT_PORT0 must be usable at the same time as RTM_FPGA_GTP

#42 sbourdeauducq closed 5 years ago
2
REC_CLOCK_P/N "NOT USED"?

#41 sbourdeauducq closed 5 years ago
2
signal names on AMC for programming RTM FPGA

#40 sbourdeauducq closed 5 years ago
1
Ethernet PHY programming

#39 sbourdeauducq closed 5 years ago
10
purpose of USB console switch

#38 sbourdeauducq closed 5 years ago
1
Sayma clocking write up

#37 hartytp closed 5 years ago
16
AMC WR options

#36 hartytp closed 5 years ago
66
recovered clock routing

#35 hartytp closed 5 years ago
11
AMC<->RTM connections are from the old version

#34 marmeladapk closed 5 years ago
1
Clk_recovery LDO

#33 tprzywoz closed 5 years ago
6
IC58 TPS74401 Vin under recommended voltage range

#32 tprzywoz closed 5 years ago
1
FPGA pinout/netlist

#31 jordens closed 5 years ago
6
DDR64 clocking with MIG

#30 kaolpr closed 5 years ago
6
Si5324 test points

#29 gkasprow closed 5 years ago
1
OSC1 has swapped _P and _N lines

#28 marmeladapk closed 5 years ago
1
TXC9 on FAT_PIPE2 has swapped _P and _N lines

#27 marmeladapk closed 5 years ago
1
Replace GT_CLK{1,2}_IN with more LVDS?

#26 hartytp closed 5 years ago
3
check net names are exactly the same on both sides of the AMC<->RTM connector

#25 hartytp closed 5 years ago
2
make sure all transceiver channels can be clocked from uFL

#24 sbourdeauducq closed 5 years ago
3
ETH PHY configuration

#23 atcher0 closed 5 years ago
1
MMC HW ID is not changed

#22 atcher0 closed 5 years ago
1
ALT_PORT0 connection

#21 atcher0 closed 5 years ago
2
Connect AMC telecom clock somewhere

#20 marmeladapk closed 5 years ago
2
[needs checking] GTH quad number clock constraints

#19 jordens closed 5 years ago
6
rename REFCLK224_C_N -> 228

#18 jordens closed 5 years ago
1
connect I2C switch reset to FPGA

#17 jordens closed 5 years ago
1
ground coax connector shields

#16 jordens closed 5 years ago
0
PUDC_B connection

#15 atcher0 closed 5 years ago
1
FP connections

#14 hartytp closed 5 years ago
6
PM I2C has no TVS

#13 marmeladapk closed 5 years ago
1
IC16 has no decoupling

#12 marmeladapk closed 5 years ago
1
EN_VCCINT testability/debugging

#11 marmeladapk closed 5 years ago
1
IC55 SCL not connected

#10 marmeladapk closed 5 years ago
1
BOM verification

#9 atcher0 closed 5 years ago
5
AMC <-> RTM FPGA connectivity

#8 hartytp closed 5 years ago
37
Transceiver clocking

#7 hartytp closed 5 years ago
4
Servo AMC<->RTM connectivity requirements

#6 hartytp closed 5 years ago
6
WR connections

#5 hartytp closed 5 years ago
9
Schematics cosmetics:

#4 hartytp closed 5 years ago
7
AMC <-> RTM connections

#3 hartytp closed 5 years ago
18

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