skordal potato issues - Githubissues

skordal / potato

A simple RISC-V processor for use in FPGA designs.

BSD 3-Clause "New" or "Revised" License

256 stars 40 forks source link

issues

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Update tests to comply with latest toolchain/RISC-V spec

#29 kagandikmen closed 2 weeks ago
1
Update tests to comply with latest toolchain/RISC-V spec

#28 kagandikmen closed 2 weeks ago
0
Bootloader issue

#27 Karyahia closed 2 months ago
0
GUI for the FPGA

#26 sarahhs1 closed 2 weeks ago
1
uart 9600 baudrate issue

#25 FurkanKahramantekin opened 3 years ago
1
Cannot make bootloader file to make .coe file for AEE ROM

#24 HollaHieu opened 3 years ago
3
Fix VHDL syntax error in pp_soc_memory process

#23 jeanthom closed 3 years ago
0
Removing instructions related to `timer_clk`

#22 pcotret closed 4 years ago
1
Failed to start hello application from main memory

#21 dorfell opened 5 years ago
3
Why Program memory Generated by extact_hex.shdoes not 8 hex digit for all instruction

#20 Mohsannaeem closed 5 years ago
2
xil_defaultlib.pp_wb_adapter missing but not show any error or critical warning

#19 Mohsannaeem closed 4 years ago
1
"bitwise AND" and "bitwise XOR" are not working

#18 hossameldin1995 opened 5 years ago
5
Bootloader stall when uploading bin files

#17 Izmno closed 5 years ago
2
RAM address has not jump to upper than 0xf

#16 joryhuang closed 5 years ago
0
hello world example no output

#15 bg2d closed 5 years ago
3
The design failed to meet the timing requirements

#14 bg2d closed 6 years ago
2
hello exmaple make failed

#13 bg2d closed 6 years ago
2
COE file generation

#12 bg2d closed 6 years ago
0
Floating point programs test

#11 Sebas95 closed 6 years ago
5
[Synth 8-549] port width mismatch for port 'addra': port width = 11, actual width = 12

#10 Sebas95 closed 6 years ago
1
aee_rom is not found (not using Vivado)

#9 STAIRB closed 6 years ago
4
Unsigned store crashes application

#8 siorpaes closed 6 years ago
3
helloworld application not working anymore

#7 siorpaes closed 6 years ago
4
Generation of dmem.hex fails

#6 stdefeber closed 6 years ago
3
Clock Generator port Map issue

#5 riscveval closed 6 years ago
3
Error: no such design unit 'clock_generator'

#4 neocogent closed 7 years ago
3
How IRQ work in potato ?

#3 santhoshvlsi closed 8 years ago
1
From Host and To host registers ??

#2 santhoshvlsi closed 8 years ago
3
Misagligned load exception when running SHA-256 benchmark without I-cache

#1 skordal closed 8 years ago
0