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Hello,
I was checking out the repository to see how to use Linux and Multizone on the same board, and I noticed that it only supports the HiFive Unleashed board, which is now discontinued. I am curre…
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- [ ] Définir bus AXI master / slave : expliquer ce que c'est axi, expliquer ahb du coeur, regarder ça plus en détail (utiliser cours de M.THIEBOLT + internet)
- [x] Résoudre les criticals warning …
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1. iceprog toplevel.bin in Murax of VexRiscv (gateware)
2. iceprog firmware.bin in picorv32
can do them both?
burn the gateware then firmware
then I can add instruction in Murax and modify risc…
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Quite a few tests here that really get around: https://github.com/riscv-software-src/riscv-tests/tree/master/isa/rv32ui
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Do you know why
```
localparam ser_half_period = 53;
```
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I wonder roughly how long it takes for running the fuzzer for a core? Is there a sign of finish?
I am current running `python3 do_fuzzdesign.py picorv32 30 100 1 0`
It has been running over 10 h…
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With proliferation of SOC designs with on-chip CPUs, the selection of open-source RISC-V IP that can be used with openXC7 flow is severely limited due to lack of support for these two essential Xilinx…
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### Verilator Simulation Warnings
While running the synthesis for the [OPL3 FM Synthesizer,](https://github.com/gtaylormb/opl3_fpga) I encountered several warnings related to the RTL code. Although…
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I have tried to run all the "make test*" in the root folder.
But seem like the "make test*" command returns an Error after the run for about 8000 cycles.
Does anyone know how to fix it?
Thank you.
…
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https://github.com/YosysHQ/picorv32/blob/f00a88c36eaab478b64ee27d8162e421049bcc66/dhrystone/start.S#L37-L50
We can see 'DONE' in registers?
khei4 updated
10 months ago