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Hi! I want to initialize multiple networks with CHaiDNN's xiInit () on Zynq UltraScale+MPSoC ZCU102 platform, and when I initialize a second network, an error is reported:"Failed to create memory!", I…
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I find that when DMA rx data end, and I use send(fd, recv_buf, len, 0) to send data to net, the speed is too slow,why?
My platform is zynq-7000 and the interface is HP, do anyone konw how to solv…
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Hi! It is a great demo and help me a lot, but I got some trouble .I am using ubuntu 20.4 to compile the demo, my gcc version is g++ (Ubuntu 9.4.0-1ubuntu1~20.04.1) 9.4.0,I compile the demo just as the…
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i try android 8 in zcu106, but display not output, and uart-usb does not work...
![KakaoTalk_20200519_213352892](https://user-images.githubusercontent.com/42532250/82381097-937be980-9a64-11ea-8f8d-…
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Hi, i am trying to link ffmpeg libraries to my SDK c project for Zynq 7030.
gcc states that libraries are build with VFP while my binary .elf is not and so the link fails. i have tried to change gcc…
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I'm looking at adding some support for ACE 4 on top of the `amba4.axi` classes we already have in `spinal.lib`, but I'm not super sure on what's the best way to proceed here. ACE adds two extra chann…
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In the list of supported boards, the ZCU102 is still listed as "WIP". What parts are and aren't supported on this board? Is it as suggested in issue #68 only the ethernet port and thus the debug inter…
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Hello. When I finally download this repository fully with all submodules, I run make rocket under 'zcu104'. Then I have this error: "boom-fpga-zynq/src/main/scala/BOOM.scala:83:68: type DCacheBoomConf…
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Hi,
we've been trying to cross-compile our own program to run on zedboard. Following the installation of the toolchain, and following this section (https://github.com/riscv/riscv-tools#-testing-your…