-
Are the Vivado projects for the pre-built examples available for download?
Thanks
-
Hi,
I've tried to sythesize vroom design using Vivado.But there are many strange errors .
My flow is :
1、make fvv generate full set sv and It can run dhrystone.
2、read all sv file into Vi…
-
It turns out that Vivado's block design facility has the annoyingly arbitrary limitation that ports may only be of type `std_logic` or `std_logic_vector`. Unfortunately, this means that VHDL produced …
-
Hello! Thanks for your repositories first! I have a board=xc7k325tffg900-2(as the same as BOARD=kc705). However, it is RGMII for the ethernet on my board. (I have deleted the ethernet and then success…
-
There is no VPI/FLI support in Vivado, but this feature is in roadmap: https://support.xilinx.com/s/question/0D52E00006hpTc1SAE/xsimiki-documentation?language=en_US (maybe, one day...)
What do you …
-
Some [paths](https://github.com/mosscomputer/moss/blob/0c20f0618d9dbadf1ec8f9ca8d9a4fe54518e0f9/toolchain/vivado/boards/xc7a35ticsg324-1l/xc7a35ticsg324-1l.xpr#L6) in `.xpr` are specific to my local m…
-
I installed the extension and added vivado path to the settings. How do I see the syntax check in my .v or .sv files?
-
Write a tcl script that will be able to generate the whole vivado project.
For this task this are candidate tcl script:
- `write_proj_tcl`: to generate source references, see [this link](https://v…
-
Could you please tell me which version of Vivado you are using? Thank you very much
-
Hello, why don't you use instead of the commercial and closed Vivado, its open counterparts, such as gEDA, icarus verilog, kiCAD ...
The fact is that the cost of a license for Vivado is very expens…