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Hi sir, I notice that the testbench requires cocotb, cocotbext-axi, and Icarus. I would be appriciated to if you could provide the verilog based testbench without using myhdl.
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Bluesim self-checking testbenches using `dynamicAssert` wind up exiting with status 0 whether they pass or fail. This makes them difficult to integrate into conventional test frameworks (or, for that …
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Verification environment : CoCoTb + ghdl
OS : Ubuntu 24.04
I have specified , with json, and generated a simple set of registers being:
0x00 : RevId, RO
0x04 : Scratch, RW
```
{
…
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Add a test bench based on cocotb. Maybe as replacement for the avocado based test bench.
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https://github.com/bespoke-silicon-group/bsg_manycore/blob/5f5c3b975396e6e87e3c00688d9facb536ea07ef/testbenches/common/v/vanilla_core_profiler.v#L120
Add comments to clarify these questions from Ch…
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Setting `WRITE_POL` to 1 inside `iob_cache.py` should configure the cache to be write back instead of write through, but when looking at the trace with gtkwave you can still find a `g_write_through` m…
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I currently have testbenches that use a transcript file. But I also like specific messages to also display on std.textio.OUTPUT. I do this in the testbench by turning on/off the mirror around specific…
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@erickahmed I propose a small thing to do to simplify the process for a lot of people. Sorry, but the file names and locations of the files are a little bit of a mess.
In any case we are now checkin…
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### [EDIT] Summary:
* Non-blocking (`
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There are parts of the cocotb scripts that appear to refer to the structure of caravel as it was some versions ago before the core was restructured. For example, in file `cocotb/interfaces/caravel.py…