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We've been struggling with the [issue](https://git.m-labs.hk/M-Labs/artiq-zynq/issues/197) that EEM ports 2-7 and 10-11 often fail to work with Samplers, Zotinos, Mirnies and probably some others.
I…
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Hello everyone,
I am currently working on a multicore version of the NEORV32 processor. I am using _Vivado 2022.2_ to generate the bitstream for the _XILINX PYNQ-Z2 FPGA_ and the last stable version …
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Would it be possible for libsignal-client/Cargo.toml to re-export curve25519-dalek features?
nightly = [curve25519-dalek/nightly]
default = [curve25519-dalek/default]
**std = [curve25519-dalek/st…
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Hello!
FPGA: Terasic DE0-Nano
Host system: Debian 12.1 (Bookworm)
FPGA Software: Quartus 22.1 Std (Free)
linux-on-litex-vexriscv: Downloaded 2023/08/29.
I am following the Readme for linu…
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Hello there!
I'm building LiteX SoC with a single rocket core on litex_sim using self made dependencies.
The steps taken to build my dependencies are the following:
1. generate the csr file u…
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# 每日安全资讯(2023-08-05)
- HackerOne Hacker Activity
- [ ] [Privilege Escalation in kOps using GCE/GCP Provider](https://hackerone.com/reports/1842829)
- Sploitus.com Exploits RSS Feed
- [ ] [PHPJabb…
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I have LinuxCNC version 2.9 on Debian Bookworm, all (including LiteX-CNC) installed or compilled without warnings or errors.
Today I was try the 5a-75e-hello-gpio.json from examples.
I get:
user@…
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Hello, I am stuck by running:
```
python3 mistex_boards/qmtech_xc7a100t_daughterboard.py Menu
```
specifically at the part of building the core in Vivado part, here is my `vivado.log`:
```
…
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### Project Name
Valtrix Systems
### Description
Valtrix Systems - an EDA company from Bangalore, India, is into the development of CPU and SoC design verification tools. STING, the flagship produc…
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I have been attempting to run some C++ programs over the FemtoRV soft processor on an FPGA.
I have been getting error messages such as this one because my programs do not fit in the available RAM:
…