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Wren6991
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Hazard3
3-stage RV32IMACZb* processor with debug
Apache License 2.0
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Is there a compressed variant of the lb instruction?
#24
technoblogy
closed
1 week ago
4
Fix abstract command using wrong register when initiated by abstractauto
#23
Wren6991
closed
2 weeks ago
0
Add support for the CXXRTL agent.
#22
whitequark
opened
2 weeks ago
0
Simulation race condition in frontend.v
#21
chrmard
opened
1 month ago
1
JTAG programming on the simulator results in corrupted memory
#20
kentindell
closed
2 weeks ago
7
Is anyone working on `-mtune`/`-march`/`-mcpu` support for Hazard3/RP2350 in GCC?
#19
palmer-dabbelt
opened
1 month ago
1
Transistor count
#18
ris-work
closed
1 month ago
1
BEXTM(I) Encoding Tables are Incorrect
#17
lenary
closed
2 months ago
3
Compilation failure under mingw64
#16
peardox
opened
2 months ago
8
Unusual use of `&` in expression
#15
taralx
closed
2 months ago
2
Promote readme and adoc changes, no functional change
#14
Wren6991
closed
2 months ago
0
Possibly broken submodule commit
#13
Min1123
closed
2 months ago
1
Readme.md / doc: clarify "naturally aligned regions", no TOR support
#12
lschuermann
closed
2 months ago
1
Update Readme.md
#11
Wren6991
closed
2 months ago
0
Reversed address and data for SW command.
#10
jstonedotorg
closed
9 months ago
2
Nits: JTAGG -> JTAG
#9
secworks
closed
11 months ago
3
what's the problem when I run 'make ' command ?
#8
bigdot123456
closed
5 months ago
3
Add OrangeCrab 25F support
#7
tannewt
closed
1 year ago
1
Help with JTAG DTM
#6
tannewt
closed
2 years ago
3
Allow reconnecting to the testbench JTAG socket
#5
tannewt
closed
1 year ago
1
error: Unable to place cell, cell type ICESTORM_LC
#4
gojimmypi
closed
2 years ago
12
Correct mnemonic when logging unsigned sltiu instruction
#3
Richard-Gordon
closed
3 years ago
1
Fix broken submodule path
#2
pftbest
closed
3 years ago
1
Make CXXRTL testbench ~25% faster
#1
whitequark
closed
3 years ago
17