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antmicro
/
rowhammer-tester
https://antmicro.github.io/rowhammer-tester/
Apache License 2.0
52
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16
forks
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Hardware Memory Test Optimization and Batch Error Reporting
#184
biecho
opened
1 month ago
1
Understanding READ Commands and Scratchpad Memory Behavior in `ddr5-tester`
#183
biecho
opened
1 month ago
14
Details about DDR5 simulation
#182
pjattke
opened
8 months ago
0
ci: use containers instead of installing texlive-full in each run
#181
umarcor
closed
8 months ago
0
Hammering hangs with --no-refresh
#180
matteo-sammartino
closed
1 year ago
2
Keep prevous flags in DFII control when switching to HW mode
#179
mtdudek
closed
1 year ago
0
Add missing Verilator requirement
#178
mtdudek
closed
1 year ago
0
Update to newest Verilator version
#177
mtdudek
closed
1 year ago
0
Test PDF button on RTD
#176
umarcor
closed
1 year ago
0
TMP trigger build
#175
umarcor
closed
1 year ago
0
Test change in antmicro-sphinx-utils to link the build_id in the footer (bis)
#174
umarcor
closed
1 year ago
0
Test change in antmicro-sphinx-utils to link the build_id in the footer
#173
umarcor
closed
1 year ago
0
Theme tests
#172
umarcor
closed
1 year ago
0
Test antmicro-sphinx-utils and RTD
#171
umarcor
closed
1 year ago
0
Change doc theme to sphinx immaterial
#170
tmichalak
closed
1 year ago
0
Can we determine the resting state of memory cells?
#169
dwalton64
opened
1 year ago
2
Need the ability to drive row hammer tests using memory channel address
#168
dwalton64
opened
1 year ago
0
doc/usage: add note about selecting bank to attack
#167
michalsieron
closed
1 year ago
0
zcu104 fixes
#166
michalsieron
closed
1 year ago
0
Build with litex bist by default
#165
tmichalak
closed
1 year ago
0
scripts/spd_eeprom: remove timeout for ddrctrl_init_done
#164
michalsieron
closed
1 year ago
0
doc: add warnings about MODE2 jumper
#163
michalsieron
closed
1 year ago
0
Update board defines in the Makefile
#162
michalsieron
closed
1 year ago
0
[WIP] DDR5 support for antmicro_ddr5_test_board target
#161
mtdudek
closed
1 year ago
0
ZCU 104 litex_server connection issue
#160
tanvirarafin
closed
1 year ago
2
Add sdram_hw_test using BIST modules from LiteX
#159
michalsieron
closed
1 year ago
1
Meson fix
#158
tmichalak
closed
1 year ago
0
docs: update SPD timing section
#157
kgugala
closed
1 year ago
2
rowhammer_tester: Increase default payload memory size to 32kB
#156
tmichalak
closed
1 year ago
0
Update zcu104 target's platform name
#155
mtdudek
closed
1 year ago
0
Buffer for Payload Executor is too Small
#154
dwalton64
closed
1 year ago
1
Documentation Needs to be Updated to Reflect that DRAM Timing is Read from SPD and Set Dynamically
#153
dwalton64
closed
1 year ago
0
Running mem_test at the BIOS console hangs if the memory range is too large.
#152
dwalton64
closed
8 months ago
2
Update target name for the Arty board
#151
michalsieron
closed
1 year ago
0
Add `make pack` target and some small fixes
#150
michalsieron
closed
1 year ago
0
Read ident
#149
michalsieron
closed
1 year ago
0
Update litex and litedram submodules
#148
tmichalak
closed
1 year ago
0
Rowhammer simulation fixes
#147
michalsieron
closed
1 year ago
0
Arty A7 35T - Etherbone/build error
#146
cortez-daniel
closed
1 year ago
1
Restructure docs
#145
robertszczepanski
closed
1 year ago
0
spd_eeprom.py times out if memory training fails and cannot read the EEPROM
#144
dwalton64
closed
8 months ago
2
Submodule cleanup
#143
tmichalak
closed
1 year ago
0
Half-Double needs 526784 bytes - can't close timing with 1MByte Payload Size
#142
rolin-ron
opened
1 year ago
1
Dynamic DDR timings
#141
tmichalak
closed
1 year ago
0
Build Verilator for simulation targets only
#140
tmichalak
closed
1 year ago
0
submodules: Use Antmicro's Litex fork
#139
tmichalak
closed
1 year ago
0
Clean up flashing tools
#138
tmichalak
closed
1 year ago
0
Dynamic DDR timings
#137
koluckirafal
closed
1 year ago
1
Documentation should mention the JTAG/SPI Jumper Settings
#136
dwalton64
closed
1 year ago
0
Add option to generate visualization for aggressors vs victims
#135
robertszczepanski
closed
2 years ago
0
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