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dmg-schematics
Reverse engineered schematics of the Game Boy's DMG-CPU B chip
Creative Commons Attribution Share Alike 4.0 International
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Fuse repos
#164
ogamespec
opened
6 days ago
10
LYC int RUPO PAGO
#163
paulb-nl
closed
5 days ago
2
MOTY
#162
paulb-nl
closed
8 months ago
3
MODE2 wire is mislabeled as MODE1
#161
tclemens
closed
1 year ago
9
APU channel 3 has wrong connection leading to wrong volume
#160
msinger
closed
1 year ago
0
SYS DECODE: Inputs of ZUBU are swapped
#159
msinger
closed
1 year ago
0
NOT_VRAM_MEM_RQ name suggestion
#158
msinger
closed
1 year ago
2
Overlay: Wrong row label
#157
msinger
closed
1 year ago
1
Cells starting with wrong letters
#156
msinger
closed
1 year ago
0
Various inverters with wrong type
#155
msinger
closed
1 year ago
5
CH4 REGS: Label of JERO is overlapping
#154
msinger
closed
1 year ago
0
CH4: GAME should be AND
#153
msinger
closed
1 year ago
0
CH1 REGS: DEBY and DEPU are wrong
#152
msinger
closed
1 year ago
0
Mixed up tri-state drivers on CPU sheet
#151
msinger
closed
1 year ago
1
RUNY
#150
rgalland
closed
1 year ago
2
Overlay update
#149
rgalland
opened
1 year ago
17
*_PHI signals
#148
msinger
closed
1 year ago
6
OAM_A_D and OAM_B_D are inverted towards D
#147
msinger
closed
2 years ago
0
IO pin names
#146
msinger
closed
1 year ago
4
CPU T1T2 inputs mislabeled
#145
msinger
closed
2 years ago
1
EXT ADR: PAHY label placement
#144
msinger
closed
2 years ago
0
SPRITE X MATCHERS 2: FEPUM -> EPUM
#143
msinger
closed
2 years ago
0
SPRITE X MATCHERS1: YHAK -> YHOK
#142
msinger
closed
2 years ago
0
SPRITE X MATCHERS1: SANY -> DANY
#141
msinger
closed
2 years ago
0
SPRITE X MATCHERS1&2: dffr-b2 -> dr-latch
#140
msinger
closed
2 years ago
0
SPRITE STORE1&2: Wrong latch type
#139
msinger
closed
2 years ago
1
SPRITE STORE1: YHUK -> YKUK
#138
msinger
closed
2 years ago
0
SPRITE X PRIO: Swapped inputs
#137
msinger
closed
2 years ago
0
SPRITE X MATCH TOP: Wrong data input for VEZO
#136
msinger
closed
2 years ago
0
Bus labels ending in underscore
#135
msinger
closed
2 years ago
3
SPRITE X MATCH TOP: Latches labeled in wrong order
#134
msinger
closed
2 years ago
0
SPRITE X MATCH TOP: Missing inverter for latch ENA
#133
msinger
closed
2 years ago
0
SPRITE X MATCH TOP: FYRA...XACA are tri-buf
#132
msinger
closed
2 years ago
1
SP PX SHIFT: Swapped inputs
#131
msinger
closed
2 years ago
0
SPRITE Y COMP: XADO and PUCO need to be inverted
#130
msinger
closed
2 years ago
0
SPRITE CTRL: OAM_PARSING signals
#129
msinger
closed
2 years ago
4
SPRITE CTRL: Dashed line
#128
msinger
closed
2 years ago
0
SPRITE Y COMP: Inputs swapped
#127
msinger
closed
2 years ago
0
SPRITE Y COMP: YWOK needs to be inverted
#126
msinger
closed
2 years ago
0
SPRITE Y COMP: YTUX...YFAP are tri-buf
#125
msinger
closed
2 years ago
0
SPRITE Y COMP: YUTX -> YTUX
#124
msinger
closed
2 years ago
0
SPRITE Y COMP: gewy and gyda are lower case
#123
msinger
closed
2 years ago
0
SPRITE Y COMP: ZAXW -> ZAXE
#122
msinger
closed
2 years ago
0
SPRITE Y COMP: TOBU and VONU wrong connections
#121
msinger
closed
2 years ago
0
PPU DECODE: XUVA has wrong /RESET
#120
msinger
closed
2 years ago
1
PPU DECODE: XECY is DR-latch
#119
msinger
closed
2 years ago
0
PPU: Reset signal names
#118
msinger
closed
2 years ago
2
CPU: Wrong OSC_STABLE input
#117
msinger
closed
2 years ago
5
GB & WIN cycles sheet review
#116
rgalland
closed
2 years ago
1
PPU OAM: GND and +5V swapped
#115
msinger
closed
2 years ago
0
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