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## Issue Description ##
I'm trying to run a simulation of the X400 QSFP. I found an extensive testbench called 'x4xx_qsfp_wrapper' but it fails. The error I get is the following:
ERROR: [VRFC 10-…
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Hi there,
Thanks for taking time reading my issue.
I am trying to use CIRCT and Calyx to lower my MLIR which is a simple four-element vector addition.
I used the following lowering pipeline t…
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Unsure how others use this but my simulator says that shared variables must be protected types, 2008.
Shared variables must be of protected type:
../src/adaptations_pkg.vhd:71:19 …
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Hello all!
I am trying to simulate ```cva6``` on ```vivado 2021.1``` and facing an error which is unknown to me. can anyone point out the source of the error. below is the elaboration log of the sim…
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### Description of the setup:
* Device: STEM Lab 125-14
* SD card image: Alpine 20220302
* Application: sdr-transceiver
* Development Machine:
* VirtualBox running on windows 10
…
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The subject says it all. I have no idea where to start with creating and maintaining a project file, starting with what it's supposed to be called and where it should live.
A simple example would b…
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Hello,
Thanks for this great work, I appreciate the whole work. It is extremely beneficial.
Actually,I removed the constraint file of KC705 board, and I used the constraint file of VC707 board, and …
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While reviewing the latest changes, I found that the version is manually bumped in several places.
On the one hand, there is project [JSON-for-VHDL](https://github.com/paebbels/json-for-vhdl), whic…
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**Bug Description**
My aim was to replicate the steps taken on the following issues tab https://github.com/litex-hub/linux-on-litex-rocket/issues/29 to boot linux, more specifically `busybox`, onto a…
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Hello,
my name is Lorenzo Lagostina, I'm working on a research project at the Polytechnic of Turin.
The research project is focused on back-end techniques, and we decided to apply them to…