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Hi, robertofem
I have tried to run supplied examples in Linux environment for HAN pilot platform from Terasic that uses Arria 10 SoC FPGA.
However, I met several problems..
First, supplied D…
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Hi ALL,
nv_small on FPGA all Sanity test and NN_L01_small_fbuf TEST PASS, md5sum output.dimg equal golden/.dimg. BUT,
golden/.dimg format file output garbled,
./nvdla_runtime --loadable NN_L01_sma…
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Looking for updates regarding the availability of a performant XP10 SW Library that was referenced in the OCP Zipline presentation back in 2019.
![OCP Zipline](https://user-images.githubusercontent…
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Hi, apparently the UART in the simulator is placed at address `0x12003000` instead of `0x12002800` when run with `--with-sdram --sdram-init boot.bin`, copied from [here](https://github.com/litex-hub/l…
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Hello,
First of all, thanks for your tutorial, it's great and easy to follow.
I followed it using an Arty 100 instead of the Arty 35 and everything seemed to work fine. However, when I try to run th…
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Hi,
my goal is to eventually run a configurable nv_small on Zynq Ultrascale+ while using an nvdc compiled caffe model for inference. I am still a novice in the field of FPGAs, NNs, etc. and have some…
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Hey @doonny and everyone!
I need download opencv libraries to compile in arm. Can someone tell me a place or tutorial where i can see how to do it?
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Hi,
I want to connect the octo soundcard directly to an fpga board like a spartan7 via gpio/pmod (or other is there a better way?). I can obviously do this through an rpi connected to the fpga but …
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I successfully booted Linux with FPU disabled. When I enable FPU, I get the following errors:
```
[ 0.156632] smp: Bringing up secondary CPUs ... …
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Hi, peteasa.
I build official 7020 HDMI project with some modification.
`set_property IOSTANDARD LVDS_25 [get_ports {TXi_*}]
set_property PACKAGE_PIN T5 [get_ports TXi_rd_wait_p]
#NET "RXO_RD_WAIT…