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I don't know how to call FPGAs like VIRTEX-6, which doesn't have ARM SoC part.
Can this be synthesized and connected to host PC through UART serial terminal on VIRTEX-6(https://www.xilinx.com/product…
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Hi,
I am facing issue while programming the eNVM using the softconsole. I am using **Softconsole v6.5.0** and programming **HSS version 2020.12**.
My board is in the jumper settings which boots th…
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Hello everyone,
I am a Ph.D student working in the area of computer architecture and signal processing. For my first experimentation, I am planning to use Litex with the ZCU102 (because it is the boa…
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hello!
I have a simple SoC design (a [nerv](https://github.com/YosysHQ/nerv) CPU with some memory and IO), and I am targeting the ECP5 development board. The issue I am getting is device utilizatio…
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In the readme file core selection section it is written:
**_By default, PULPissimo is configured to use the RI5CY core with floating-point support being enabled. To switch to Ibex (and disable floa…
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**Is your feature request related to a problem? Please describe.**
[LiteX](https://github.com/enjoy-digital/litex) is an excellent System on Chip build environment [that supports many different sof…
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Hello,
I'm using this example project to do some FIC1 access where MSS is the master and the Fabric is the slave.
The lines I added to u54_1.c are after "MSS_RTC_clear_irq()":
uint64_t *pointer…
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Hi!
According to ICICLE Kit Documentation (DS60001679B - ICICLE_Kit_User_Guide_VB) the eMMC of the ICICLE Kit (Sandisk SDINBDG4-8G) should support HS400 bus speed mode (coupled with 200 MHz clock s…
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**Describe the bug**
lan743x module fails to map DMA here https://github.com/raspberrypi/linux/blob/rpi-5.10.y/drivers/net/ethernet/microchip/lan743x_main.c#L1986
**To reproduce**
Using the CM4…
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I am trying to follow the steps mentioned in [How to: design a single-core SoC](https://www.esp.cs.columbia.edu/docs/singlecore/singlecore-guide/) for the default single-core Ariane SoC with ESP R…