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axi_traffic_gen_0 file not found ? pls add it
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Hi,
I observed that in the **cva6_tb_wrapper.sv file**,
1. we are connecting axi_interface signal based on axi_switch_vif as done in below assign statement
****assign axi_ariane_resp.aw_ready =…
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Hi, When I use the dma_wr module, I found a bottleneck in the transmission bandwidth;I want to know that dma module whether support outstanding transmission or not,thanks!
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Hi,
I discovered a problem on our AXIDownConverter.
When AXI Master initiate subword access, our AXIDownConverter would generate illegal request to downstream.
See following examples:
For a …
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The module `axi_burst_splitter` instantiates an `axi_demux` and sets its `AxiLookBits` to the full ID width of the bus:
```
axi_demux #(
.AxiIdWidth ( IdWidth ),
.aw_chan_t ( …
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On a “STEM 125-14 4-Input” board, calling the `rp_Init()` function from the C API produces eight error messages on `stderr`.
Test program:
```c
#include
#include
int main(void) {
int…
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### Is there an existing CVA6 bug for this?
- [X] I have searched the existing bug issues
### Bug Description
Hello, I'm trying to run ariane_tb.sv on Cadence Xcelium 22.03 from `xrun_all` Ma…
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Hi sir, I want to use cocotb-axi to simulate the axi_ram module and I changed **mem** to output, but I cannot see the **mem** waveform in the .fst file.I would be appriciated to if you could tell me h…
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I synthesized the project with quartus pro 24.1 and got
- 0 error
- 21 criticals warnings
- 524 warnings
Criticals warnings are following :
```
Critical Warning(18010): Register pd_system|v…
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When testing with a microblaze core that has a AXI timer, freertos fails to get tick interrupts with the hello world example and the example simply hangs on the first vTaskDelay.
![image](https://…
tlf30 updated
16 hours ago