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pulp-platform
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axi
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
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Rewrite simpler axi_id_serializer
#342
micprog
opened
1 month ago
0
Expose `AxiLookBits` as a parameter in `axi_burst_splitter`
#341
jfornt-bsc
opened
1 month ago
1
Allow custom XBAR latency configurations (e.g., vivado)
#340
micprog
closed
1 month ago
1
Why is `xbar_latency_e` an `enum`?
#339
FrancescoConti
closed
1 month ago
1
`axi_sim_mem`: Configure response data
#338
micprog
closed
1 month ago
0
Error when IdMapNumEntries =0 with VCS
#337
franktaTian
opened
2 months ago
0
"MaxTrans" defined incorrectly in the module documentation
#336
deepakmmathew
opened
2 months ago
0
axi_from_reg: Add module
#335
paulsc96
closed
3 months ago
2
Occamy: Move `axi_zero_memory` and `axi_interleaved_xbar` to AXI repository.
#334
thommythomaso
closed
3 months ago
0
Compile errors with CDC module
#333
omeag
opened
3 months ago
0
Can't find cdc_fifo_gray_dst
#332
omeag
opened
3 months ago
2
Fix byte calculation in axi_sim_mem R and W forks
#331
LucaZulberti
closed
3 months ago
0
Pipelines between demux and mux would still cause deadlock in an axi_xbar?
#330
lionheart117
opened
5 months ago
2
Minor improvements to `axi_rand_master`
#329
luca-valente
closed
1 month ago
0
AXI_BUS and AXI_BUS_DV package missing?
#328
MaanasSanaam
closed
5 months ago
2
src: Remove missing pin warnings
#327
colluca
closed
4 months ago
1
Add axi_burst_unwrap
#326
niwis
opened
6 months ago
0
axi_iw_convertor connection
#325
Manas-create
opened
8 months ago
0
Logging not supported for Queue item error : AXI
#324
ChandraLekha559
opened
8 months ago
2
axi_dw_downsizer: Fix `i_forward_b_beats_queue` underflow
#323
colluca
opened
9 months ago
4
Add reset states to axi_atop_filter to fix zero time sim hang
#322
uge
opened
9 months ago
0
axi_dw_downsizer writing data beats with wstrb == 0
#321
Kevin99214
opened
9 months ago
0
Properly handle response code in axi_to_detailed_mem
#320
micprog
closed
9 months ago
0
``axi_to_mem``: Error response signals in B and R response channels
#319
glaserf
closed
9 months ago
0
include/axi: Add support for signal highlighter and add flat port instantiation macros
#318
thommythomaso
closed
11 months ago
0
axi_lite_dw_converter: Enable user size pass from AXI converter
#317
thommythomaso
opened
11 months ago
0
axi_chan_compare: Adds parameter to allow reordered transactions
#316
thommythomaso
closed
11 months ago
0
Add random user signal generation for llc-partition test
#315
thommythomaso
opened
11 months ago
0
Create per-channel user signals
#314
thommythomaso
opened
11 months ago
0
Vivado Synthesis Error - [Synth 8-6038] cannot resolve hierarchical name
#313
abel-kun
opened
11 months ago
0
Propagation of the cdc gray SYNC_STAGES parameter to the interfaces
#312
mattsini1
closed
11 months ago
0
Release v0.39.0
#311
thommythomaso
closed
11 months ago
0
tb_axi_lite_xbar is not included in scripts/run_vsim.sh
#310
bafeigum
opened
11 months ago
0
Add a detailed axi_to_mem to expose more signals for ATOPS
#309
micprog
closed
12 months ago
0
`axi_scoreboard`: avoid false negs for mem-mapped misaligned reads.
#308
luca-valente
closed
11 months ago
0
axi_burst_splitter: Expose id_queue module's FULL_BW parameter
#307
colluca
closed
11 months ago
0
Add axi_demux without spill registers for simplicity
#306
micprog
closed
12 months ago
0
Fix spyglass lint error
#305
micprog
closed
1 year ago
0
axi_to_mem_interleaved: Add interface version
#304
bluewww
closed
11 months ago
0
Update CI badge
#303
micprog
closed
1 year ago
0
Fix lint error
#302
micprog
closed
1 year ago
0
axi_chan_compare: Support remapped IDs
#301
fischeti
closed
1 year ago
0
axi_id_serialize: Add optional ID base and map parameters
#300
paulsc96
closed
1 year ago
0
run_vsim.sh: Run simulations in parallel
#299
colluca
opened
1 year ago
4
Use pulp-actions for internal CI
#298
micprog
closed
1 year ago
0
Fix typo in comments
#297
zeeshanrafique23
closed
1 year ago
1
PATRONoC source code
#296
vikramjain236
opened
1 year ago
0
PATRONoC source code
#295
vikramjain236
closed
1 year ago
0
axi_cdc fpga implementation very inefficient
#294
skokvermon
opened
1 year ago
2
axi_pkg: keep hardcoded value in typedef for vivado ip packager
#293
CyrilKoe
closed
1 year ago
0
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