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chipsalliance
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rocket-chip
Rocket Chip Generator
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Support non-V, but with-vector implementations
#3690
jerryz123
closed
2 days ago
0
remove master slave terminology from rocket-chip
#3688
lordspacehog
opened
1 week ago
1
A moderately dangerous interupt domain crossing bug
#3687
DecodeTheEncoded
opened
2 weeks ago
2
Cannot find *behav_srams.v` in generated verilog files
#3686
xlgforever
opened
2 weeks ago
0
CanAttachTile.crossingParams is inappropriately used.
#3685
DecodeTheEncoded
opened
2 weeks ago
4
Remove "master/slave" terminology from Rocket Chip repo
#3684
ben-k
opened
3 weeks ago
1
Add RocketChip Technical Charter
#3683
bensternthal
closed
2 weeks ago
1
VM disabled: support larger physical addresses
#3682
ingallsj
closed
1 month ago
1
AMO inst based on a mmio address will cause a store/amo access fault
#3679
csgxiong
opened
1 month ago
0
increase depth of SimpleHellaCacheIFReplayQ #3653
#3678
PhilippKaesgen
closed
1 month ago
0
Chisel generates invalid nesting of always blocks and/or initializations.
#3677
leviathanch
opened
1 month ago
2
Prioritize coprocessor FPU reqs over core FPU reqs
#3676
jerryz123
closed
3 weeks ago
2
Sync dev to master
#3675
jerryz123
closed
1 month ago
1
Litex2
#3674
leviathanch
closed
1 month ago
5
Solve naming conflict with Yosys
#3673
leviathanch
opened
1 month ago
4
Issue in VTestDriver__Trace__2__Slow.cpp
#3672
gituserdeepika
opened
1 month ago
0
Colliding module name: ALU
#3671
leviathanch
opened
1 month ago
3
Prevent bypasses from vector instructions | fix vsets
#3670
jerryz123
closed
1 month ago
1
Creating 32 bit rocket-chip without fpu
#3669
gituserdeepika
closed
1 month ago
3
Steps to assemble and execute a riscv assembly file
#3668
gituserdeepika
closed
1 month ago
1
B ext
#3667
jerryz123
closed
1 month ago
2
Unable to generate vcd file from a riscv assembly file
#3666
gituserdeepika
closed
1 month ago
6
Support vector extensions
#3665
jerryz123
closed
1 month ago
0
./build-setup.sh errors in chipyard flow
#3663
gituserdeepika
closed
2 months ago
4
./build.sh not found and make verilog error
#3662
gituserdeepika
closed
2 months ago
2
Switch waveform generation to FST
#3660
sequencer
opened
2 months ago
1
Fix support for vector units with Zvfh
#3659
jerryz123
closed
2 months ago
0
Java compilation error, prompting no byte 4096 alignment
#3658
Jerryy959
closed
1 month ago
4
Make verilog Error
#3657
Krishnakumarmohanraj
opened
2 months ago
4
unable to build the C emulator due to missing verilog.h file
#3656
nhuynh368
opened
3 months ago
0
Move rocket-related config fragments to rocket/Configs.scala
#3655
jerryz123
closed
2 months ago
0
Adding new config fragments to Rocket-chip subsystem Config.scala
#3654
Kevin99214
closed
3 months ago
2
Replay queue depth insufficient for RoCC accelerators
#3653
PhilippKaesgen
opened
3 months ago
1
Allow non-V implementations of vector units, with Zve/Zvl extensions
#3652
jerryz123
closed
3 months ago
0
PTW: traverse check GPA bits higher than HGATP mode only if leaf
#3651
ingallsj
closed
3 months ago
0
Migrate rocketchip utils to standalone library
#3650
lordspacehog
opened
3 months ago
8
vcs compile error
#3649
dimory
opened
3 months ago
0
Interrupts coming outwards from the Tile should cross into a toPlicDomain
#3648
jerryz123
closed
3 months ago
0
Bus Error Unit cannot find implicit clock when RocketTile crossingType is set to RationalCrossing
#3647
Kevin99214
closed
3 months ago
2
class RocketChip$macro$3 needs to be abstract.
#3646
Amagicman
closed
3 months ago
3
Add "MergedCreditedCrossing" for TileLink channels
#3645
jerryz123
opened
3 months ago
1
Error: Assertion failed: 'A' channel re-used a source ID when running simulation in QuestaSim
#3644
DonnieThang
opened
4 months ago
1
the usage of cover and cover point, and how to coordinate with backend.
#3643
zhao-denghui
opened
4 months ago
1
Move clocking/resources out of diplomacy subpackage
#3642
jerryz123
closed
3 months ago
0
Set parameterized desiredName on many system components
#3641
jerryz123
closed
3 months ago
0
Name the ClockDomains
#3639
jerryz123
closed
4 months ago
2
Add support for desiredName overrides for ClockDomains
#3638
bchetwynd
closed
4 months ago
1
Add IO Connections for Custom User Field in TL Channels within Xbar
#3637
ksungkeun84
closed
2 months ago
9
Debugging section of README.md leads nowhere
#3636
Nerotos
opened
4 months ago
0
RoCC: io.mem.req.ready stuck
#3635
ARF1939261764
opened
4 months ago
0
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