mortbopet VSRTL issues - Githubissues

mortbopet / VSRTL

Visual Simulation of Register Transfer Logic

MIT License

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issues

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Missing include <cstdint>?

#60 hcmh closed 10 months ago
1
Active path and FSM

#59 SteliosKaragiorgis opened 11 months ago
7
Need help to install VSRTL in Ubuntu

#58 SudeepJoshi22 opened 1 year ago
0
Active path for MIPS Processors

#57 SteliosKaragiorgis closed 11 months ago
3
printf in cli mode?

#56 gits00 closed 1 year ago
1
Before pull-requesting VSRTL on Qt6

#55 magiwanders opened 1 year ago
1
Build error: the type ‘const QColor’ of ‘constexpr’ variable ‘vsrtl::WIRE_DEFAULT_COLOR’ is not literal

#54 nandlab closed 2 years ago
2
Build firrtl simulator by related components

#52 itviewer opened 4 years ago
7
Move CI/CD to GitHub Actions

#51 mortbopet closed 4 years ago
0
Fix bounding rect of PortGraphic

#50 mortbopet closed 4 years ago
0
Add initialization check in vsrtl_component ensuring no identically-named ports or subcomponents

#49 mortbopet closed 4 years ago
1
Implement different drawstyles

#48 mortbopet opened 4 years ago
0
Allow ports to be on the top and bottom of components

#47 mortbopet opened 4 years ago
0
Increase testing code coverage

#46 mortbopet opened 4 years ago
0
Modify the "Shape" struct and related drawing to include center text

#45 mortbopet closed 4 years ago
1
Use reflection for transmitting Enum values to graphic component

#44 mortbopet closed 4 years ago
1
Investigate whether the propagation functions can be width-templated

#43 mortbopet opened 4 years ago
0
Implement comparison operators for class Port

#42 mortbopet opened 4 years ago
0
Implement concurrent propagation

#41 mortbopet opened 4 years ago
0
Do not explore entire graph for each clock cycle

#40 mortbopet closed 4 years ago
1
Add VSRTL settings widget

#39 mortbopet opened 4 years ago
0
Add "Expand all components" functionality

#38 mortbopet closed 4 years ago
0
add BFS placement

#37 mortbopet closed 4 years ago
1
Clean up include paths

#36 mortbopet closed 3 years ago
0
Convert Q_ASSERT(false) to Q_UNREACHABLE()

#35 mortbopet opened 5 years ago
0
Remove "vsrtl_" prefix

#34 mortbopet opened 5 years ago
0
Add serialization of graphical configuration

#33 mortbopet opened 5 years ago
0
Make vsrtl::ComponentGraphic and vsrtl::wireGraphic return accurate Shape's

#32 mortbopet closed 4 years ago
0
Create logic gate unit test

#31 mortbopet opened 5 years ago
0
Add "Memory" core component

#30 mortbopet closed 4 years ago
1
Create "Undo" unit test

#29 mortbopet opened 5 years ago
0
Create "restart" unit test

#28 mortbopet opened 5 years ago
0
Move graphics library #define's to QSettings

#27 mortbopet opened 5 years ago
0
Make NetlistItem independent of models

#26 mortbopet closed 5 years ago
0
Make port value changes trigger modelindex updates

#25 mortbopet opened 5 years ago
3
Add register-only netlist view

#24 mortbopet closed 5 years ago
1
Add windows CI

#23 mortbopet closed 4 years ago
2
Implement shared selection model

#22 mortbopet opened 5 years ago
0
Port & wire does not update when Source port is out of view

#21 mortbopet closed 5 years ago
1
Implement register output value editing through netlist

#20 mortbopet closed 5 years ago
0
Qt 5.12.1 Windows MinGW 7.3.0 64bit Need to add #include <QAction> in vsrtl_netlist.cpp

#19 mars4zhu closed 5 years ago
3
Allow traversal from PortGraphic source to sink

#18 mortbopet closed 5 years ago
1
Move topological sort placement algorithm to PlaceRoute

#17 mortbopet closed 5 years ago
0
Create initial Placement algorithm

#16 mortbopet opened 5 years ago
0
Interpret PlaceRoute result in ComponentGraphic

#15 mortbopet opened 5 years ago
0
Create data structure for containing the place & route result

#14 mortbopet opened 5 years ago
1
Create place & route singleton

#13 mortbopet closed 5 years ago
0
Circuit simulation visualization ideas

#12 mortbopet opened 5 years ago
3
Undo/Redo in vsrtl core

#11 mortbopet closed 5 years ago
1
Make propagation algorithm traverse circuit only one

#10 mortbopet closed 5 years ago
0