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RTL, Cmodel, and testbench for NVDLA
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nv_full change rams/model/* with my own rams,but how can i make run sanity again with my own rams
#272
HunterBitos
closed
5 years ago
0
Optional Input in NV_NVDLA_CDMA_IMG_pack
#271
redpanda3
closed
5 years ago
0
nv small with *_DATA_TYPE_INT16_FP16 Error
#270
nsherer
opened
5 years ago
8
nv_small syntheis IOB is too large
#269
huangwei858
opened
5 years ago
7
why PDP has seven padding value ?
#268
zhouweiscut
opened
5 years ago
1
NVDLA integrated with RISC-V SoC on Amazon FPGA Cloud
#267
farzadfch
opened
5 years ago
8
Run nv_small ON FPGA ZCU102.Test = Run NN/NN_L0_1_small_fbuf But Dead here, can't keep running.
#266
ghost
opened
5 years ago
2
Can nvdla_small spec be modified with secondary SRAMIF and batch mode for NN_L0_1_small_fbuf?
#265
nookfoo
opened
5 years ago
5
about nvdla small interrupt configuration
#264
akioolin
opened
5 years ago
1
test failure in nv_small_256_full
#263
LYB2012
opened
5 years ago
0
More RTL Testbenches Possible?
#262
silvaurus
opened
5 years ago
0
nv_full.spec: file not recognized: File format not recognized
#261
piotr-aldec
closed
5 years ago
2
Correct input.txn of tests
#260
cepiross
opened
5 years ago
0
Question on RTL test bench googlenet_conv2_3x3_int16
#259
silvaurus
opened
5 years ago
1
Additional Width for Weight Bank Calculation
#258
redpanda3
opened
5 years ago
0
Additional width of {mon_data, data}
#257
redpanda3
opened
5 years ago
0
where is DW02_multp,DW02_sum ?
#256
honorpeter
closed
5 years ago
3
Regarding detaching of rams
#255
gk5559
opened
5 years ago
0
nvdla_small running on FPGA, wrong inference compared to golden results
#254
nookfoo
opened
5 years ago
8
googlenet_conv2_3x3_int16/input.txn testcase load mem address is not aligned with 512bits?
#253
zhajio1988
opened
5 years ago
0
why is there two groups for BDMA lanuch registers?
#252
zhouweiscut
closed
5 years ago
0
how to implement depthwise separable convolution on NVDLA ?
#251
zhouweiscut
closed
5 years ago
5
Question: The purpose of D_RELEASE register
#250
anakin1028
opened
5 years ago
0
do we need to load all feature data to CBUF before starting convolution ?
#249
zhouweiscut
closed
5 years ago
4
Redundancy in int_sum_block
#248
redpanda3
opened
5 years ago
0
How to use vp to extract feature map and weight?
#247
wxbbuaa2011
opened
5 years ago
0
How to combine FPGA and nvdla_SW
#246
xiaoguoer
opened
5 years ago
6
do you have test case for more than one pipeline ?
#245
zhouweiscut
opened
5 years ago
0
Share of our work about an nv_small system
#244
SCLUO
closed
2 years ago
33
ITOP definition
#243
redpanda3
opened
5 years ago
0
Question for PDP Max Pooling
#242
anakin1028
opened
5 years ago
1
testcase for compressed weight?
#241
kouzhentao
opened
5 years ago
0
Verilator Sanity0 test waiting on reg_read.
#240
shashank-natesh
opened
5 years ago
0
pipe_p3
#239
redpanda3
opened
5 years ago
0
how to config fused mode?
#238
xiaoguoer
closed
5 years ago
4
how does nvdla
#237
xiaoguoer
closed
5 years ago
0
Error while building verilator.
#236
shashank-natesh
closed
5 years ago
0
bug: NV_NVDLA_CDMA_wt.wt_wr_dmatx_cnt, clock is gated when decrease
#235
kouzhentao
opened
5 years ago
1
Reg_le in SDP_CORE_Y_Iut
#234
redpanda3
opened
5 years ago
0
Naming Issue in reg2dp
#233
redpanda3
opened
5 years ago
0
Use VP print the register instruction to make the input.txn
#232
wxbbuaa2011
opened
5 years ago
2
question for NV_NVDLA_CMAC_CORE_MAC_mul module
#231
zhouweiscut
closed
5 years ago
4
About the Scalability parameters and ConfigROM
#230
shgangchen
opened
5 years ago
7
differences between master and nv_small
#229
shgangchen
closed
5 years ago
2
about systemc in NVDLA
#228
shgangchen
closed
5 years ago
3
does it have more detail description for NVDLA registers?
#227
zhouweiscut
closed
5 years ago
1
How the input.txn file is generated?
#226
wxbbuaa2011
opened
5 years ago
0
Software applications to run on NVDLA RTL
#225
akrutishivhare
opened
5 years ago
0
Read_reg issue Sanity0 test
#224
shashank-natesh
opened
5 years ago
0
CMOD: assertion for certain SDP throughput settings.
#223
ghost
opened
5 years ago
2
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