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openhwgroup
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cva6
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
https://docs.openhwgroup.org/projects/cva6-user-manual/
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Bump core/cache_subsystem/hpdcache from `32407cb` to `0d09330`
#2216
dependabot[bot]
closed
2 weeks ago
7
Bump verif/core-v-verif from `b92d30f` to `835720b`
#2215
dependabot[bot]
closed
3 weeks ago
1
About VERDI
#2214
Ajian12
closed
3 weeks ago
0
[TASK] [FPGA] Support for Xilinx AXI 1G/2.5 G Ethernet Subsystem
#2213
WorldofJARcraft
opened
3 weeks ago
6
Change CVV submodule to CVV PR 2460
#2212
MarioOpenHWGroup
closed
3 weeks ago
2
[Xcelium flow] sim yaml
#2211
CoralieAllioux
closed
3 weeks ago
1
[Xcelium flow] corev dv yaml
#2210
CoralieAllioux
closed
3 weeks ago
2
superscalar: add a second issue port
#2209
cathales
closed
3 weeks ago
2
Add param to enable/disable Zihpm and Zicntr extensions for 65x
#2208
JeanRochCoulon
closed
3 weeks ago
7
Remove extra -v in smoke-tests.sh
#2207
math-gout
closed
3 weeks ago
3
[riscv-config] Align CV32A65X spec on adoc, cleanup defs. Fix CSR updater.
#2206
zchamski
closed
3 weeks ago
1
OBI protocol between Frontend to icache
#2205
yanicasa
closed
3 weeks ago
0
[Explanation please] <Struggling to understand what verilog is used in a given instance of CVA6>
#2204
ibooga
closed
3 weeks ago
3
Branch feature/interconnect: fetch upstream
#2203
yanicasa
closed
3 weeks ago
0
[BUG][doc] incorrect set of pmpcfgN registers in CV32A65X annotated spec
#2202
zchamski
closed
2 weeks ago
3
Do not support zihpm for 65x
#2201
JeanRochCoulon
closed
3 weeks ago
0
Failed to run any other C programs other than hell_world.c
#2200
Tanishqgithub
closed
3 weeks ago
9
Some confusion about using Verdi to view.vcd files
#2199
cllll402
closed
3 weeks ago
4
Bug : Spike raise an exception on reading some legal CSRs
#2198
AyoubJalali
closed
3 weeks ago
9
Update coverage script after exclude HPDcache module
#2197
AyoubJalali
closed
4 weeks ago
0
Update VCS compile flow to 2-step flow in testharness and update UART to version 0.2.1
#2196
xiaoweish
closed
2 weeks ago
14
Feat axi arbiter for extended hpdcache
#2195
takeshiho0531
closed
4 weeks ago
0
Exclude HPD cache module from code coverage
#2194
AyoubJalali
closed
4 weeks ago
1
Update riscv-config infra to better match expressivity needs of CV32A65X.
#2193
zchamski
closed
4 weeks ago
0
Read-only 0 CSRs
#2192
JeanRochCoulon
closed
2 weeks ago
3
CSR spec improvements
#2191
JeanRochCoulon
closed
2 weeks ago
3
Fix Github CI by changing riscv-isa-sim hash
#2190
MarioOpenHWGroup
closed
4 weeks ago
3
New LINT error introduced by #2178
#2189
JeanRochCoulon
closed
2 weeks ago
2
[BUG] Issue with Running Hello World C Program in CVA6
#2188
shreyas-kalikar
closed
5 days ago
3
Fix access issues for reserved fields
#2187
AbdessamiiOukalrazqou
closed
4 weeks ago
0
add Unprivileged RISC-V ISA for CV32A65X doc
#2186
ASintzoff
closed
4 weeks ago
0
How to get the Power consumption of CVA6
#2185
Vinay0203
closed
3 weeks ago
2
how to print the output of the hello_world.c file which is specified in "printf" statment
#2184
Vinay0203
closed
4 weeks ago
3
Add the capability to add functional coverage results into the dashboard
#2183
AyoubJalali
closed
4 weeks ago
1
Connect the new AXI agent with CVA6
#2182
AEzzejjari
closed
4 weeks ago
3
Disable MISA WE in Reference Model
#2181
MarioOpenHWGroup
closed
1 month ago
5
add Unprivileged RISC-V ISA for CV32A65X doc
#2180
ASintzoff
closed
1 month ago
0
OBI protocol between Frontend to icache
#2179
yanicasa
closed
3 weeks ago
3
Add support for cv32a65x dedicated synthesis
#2178
Gchauvon
closed
4 weeks ago
6
doc cv32a65x: update xPELP fields in mstatus
#2177
ASintzoff
closed
1 month ago
0
HOTFIX [riscv-config]: Regenerate output files for CV32A65X.
#2176
zchamski
closed
1 month ago
0
CORE-DV : Merge all exception handlers in one to optimize time simulation
#2175
AyoubJalali
closed
1 month ago
1
Ignore instr_addr_misaligned exception only when also there's a trap
#2174
AyoubJalali
closed
1 month ago
1
refac: (in hpdcache interface) separate the modules for dcache and icache
#2173
takeshiho0531
closed
3 weeks ago
14
[BUG] Spike unknown version issue
#2172
shreyas-kalikar
closed
4 weeks ago
5
CONTRIBUTING.md does not mention linting
#2171
jquevremont
closed
1 month ago
3
32 bits WB cache
#2170
cyprienh
closed
1 month ago
2
update riscv-isa-manual to riscv-isa-release-1bec7d3-2024-05-28
#2169
ASintzoff
closed
1 month ago
1
Revert "Functional coverage report in CI (#2127)"
#2168
cathales
closed
1 month ago
1
TRAP VERIF : Add checking pc after a trap and remove unnecessary coverage
#2167
AyoubJalali
closed
1 month ago
1
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