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riscv-non-isa
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riscv-iommu
RISC-V IOMMU Specification
https://jira.riscv.org/browse/RVG-55
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Incompatible test result in ATS InD=1 request
#324
zetalog
closed
1 month ago
1
Add missing did too wide check to inval_pdt
#323
ved-rivos
closed
1 month ago
0
Add missing DID too wide check for inval_pdt
#322
ved-rivos
closed
1 month ago
0
Questions about ATS translation request and ATS Page Request handling
#321
wangyongzhen0322
closed
1 month ago
6
Should the hpm counter still count when a fault is checked?
#320
wangyongzhen0322
closed
1 month ago
2
Question about did check in IODIR.INVAL_PDT
#319
viktoryou
closed
1 month ago
8
Why the attribute of iohpmctr and iohpmevt.OF is RW?
#318
wangyongzhen0322
closed
1 month ago
2
Question about internal data path error definition and usage
#317
viktoryou
closed
1 month ago
1
Should the set of both AV and WSI in iofence command be illegal
#316
viktoryou
closed
2 months ago
4
Update response code for too wide device ID
#315
ved-rivos
closed
2 months ago
0
Add missing too wide device ID check
#314
ved-rivos
closed
2 months ago
0
Whether there is a missing `RSW` check?
#313
baimengwei
closed
2 months ago
1
Question about device ID validity detection in PRI request
#312
viktoryou
closed
2 months ago
3
Question about the description of t2gpa usage scenario
#311
viktoryou
closed
2 months ago
2
Question about ATS invalidation timeout generation
#310
viktoryou
closed
2 months ago
2
Question related to Bypass/Global bits in ATS_TRANS_RESP
#309
zetalog
closed
2 months ago
13
Use check_access_perms term
#308
ved-rivos
closed
2 months ago
0
update step 16 of MSI trans to match spec
#307
ved-rivos
closed
2 months ago
0
Add a helper to extract attributes
#306
ved-rivos
closed
2 months ago
0
why need to add `masked_upper_bits != mask`
#305
baimengwei
closed
2 months ago
2
Question about transaction access fault detection in MSI translation
#304
viktoryou
closed
2 months ago
1
Special restriction of ATC implementation comparing to the RISC-V IOMMU
#303
zetalog
closed
2 months ago
14
Clarification related to the reference model EXE/PRIV enforcements
#302
zetalog
closed
2 months ago
8
add missing Bare and Off check
#301
ved-rivos
closed
2 months ago
0
Question about page request fault report related to iommu_mode in model
#300
viktoryou
closed
2 months ago
1
Question about icvec behavior in WSI mode
#299
viktoryou
closed
2 months ago
5
revert bad commit
#298
ved-rivos
closed
2 months ago
0
Update *en behavior to latest spec
#297
ved-rivos
closed
2 months ago
0
Question about fence_w_ip description with the system configuration
#296
viktoryou
closed
2 months ago
1
Question about pqen change to set pqh
#295
viktoryou
closed
2 months ago
1
Concerns related to the requirement of inquiry of DC for PRI enabling (EN_PRI)
#294
zetalog
closed
2 months ago
7
Shadow Stack page type (Zicfiss) remains reserved
#293
ved-rivos
closed
2 months ago
0
grant exec only if requested
#292
ved-rivos
closed
2 months ago
0
Ambiguity and conflict of IOMMU and PCIe ATS translation permission result
#291
zetalog
closed
2 months ago
2
Fix issue 289
#290
ved-rivos
closed
2 months ago
0
Micro error in iommu_translate.c
#289
HDntown
closed
2 months ago
1
Missing reserved check - issue 287
#288
ved-rivos
closed
3 months ago
0
Incomplete check of "cause = 263" about RESERVED bits in msipte.translate_rw
#287
HDntown
closed
2 months ago
1
Fix IOVA bits 63:32 must be 0 check for SXL=1
#286
ved-rivos
closed
3 months ago
0
Question about VA fault detection in system both support Sv32 and Sv39
#285
viktoryou
closed
3 months ago
1
Sorry,how to configure the value of capabilities.PAS?
#284
augsug
closed
3 months ago
4
Fix missing fault logging in reference model for ATS Translation request with UR/CA resp…
#283
ved-rivos
closed
4 months ago
0
D-bit description is wrong in the last version of specification
#282
zetalog
closed
3 months ago
3
How does IOMMU ensure that it does not receive outdated PCIe inbound traffic after completing TLB invalidation?
#281
18772820305
closed
5 months ago
2
how to understand the PR/PW bit in IOFENCE command.
#280
runninglinuxkernel
closed
5 months ago
4
remove "PDT" word
#279
runninglinuxkernel
closed
6 months ago
4
How to invalidate the MSI page table cache?Are the two addresses A in Figure 1 and Figure 2 the same?
#278
18772820305
closed
5 months ago
5
has SIOV support for RISC-V?
#277
runninglinuxkernel
closed
6 months ago
2
Issue 275
#276
ved-rivos
closed
6 months ago
0
the reserved bit width should be 16
#275
baimengwei
closed
6 months ago
2
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