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xlsynth
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bedrock-rtl
High quality and composable base RTL libraries in Verilog
Apache License 2.0
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verilog.bzl updates
#75
mgottscho
closed
23 hours ago
0
Implement #68 feature request - reinitializable `br_counter_*`
#74
mgottscho
closed
20 hours ago
0
RDC-robust credit initialization
#73
bgelb-openai
opened
1 day ago
2
Implement `br_fifo_flops_push_credit`
#72
mgottscho
closed
2 days ago
0
Implement `br_credit_receiver` and `br_fifo_ctrl_1r1w_push_credit`
#71
mgottscho
closed
2 days ago
0
Implement br_credit_receiver
#70
mgottscho
closed
2 days ago
0
add BR_ASSERT_STATIC_IN_PACKAGE
#69
bgelb-openai
closed
2 days ago
1
Add reinit and reinit_value ports to the br_counter_* variants.
#68
rahulnagarajan-openai
closed
20 hours ago
1
Implement `br_credit_sender`
#67
mgottscho
closed
3 days ago
0
Fix path bug in Bazel rule for generated files
#66
mgottscho
closed
3 days ago
0
Fix bugs in `br_fifo_ctrl_1r1w`
#65
mgottscho
closed
4 days ago
0
Fix bugs in `br_flow_reg_rev`
#64
mgottscho
closed
4 days ago
0
Fix combinational macros; add elab unit tests for macros
#63
mgottscho
closed
4 days ago
0
Implement `br_credit_counter`
#62
mgottscho
closed
4 days ago
0
Fix macro polarity
#61
mgottscho
closed
4 days ago
0
Make get_transitive public
#60
sherbst-openai
closed
6 days ago
1
arbs: adjust priority update behavior
#59
mgottscho
closed
1 week ago
1
Document feature plans in README
#58
mgottscho
closed
1 week ago
0
Set up elab/lint sweeps over combinations of defines
#57
mgottscho
closed
1 week ago
0
Lint fixes
#56
mgottscho
closed
1 week ago
0
Updates to convenience scripts
#55
mgottscho
closed
1 week ago
0
Remove GitHub Actions Verible tests (redundant with pre-commit)
#54
mgottscho
closed
1 week ago
0
Add chipstack stuff to gitignore
#53
mgottscho
closed
1 week ago
0
Pre-commit GH action; ignore ChipStack-generated files with Verible
#52
mgottscho
closed
1 week ago
0
Fix macro polarity bug
#51
mgottscho
closed
1 week ago
0
Formally verify `br_delay` and `br_delay_nr` with ChipStack
#50
mgottscho
closed
1 week ago
0
Fix or waive things found with stronger lint rules
#49
mgottscho
closed
1 week ago
0
Set up elab and lint test suites with parameter sweeps
#48
mgottscho
closed
1 week ago
0
verilog_elab_test/verilog_lint_test: add support for top-level module params
#47
mgottscho
closed
1 week ago
0
Add lint waivers for clk and rst when only used for assertions
#46
mgottscho
closed
1 week ago
0
Refactor br_fifo_ctrl_1r1w into two major submodules
#45
mgottscho
closed
2 weeks ago
0
Get all modules lint clean
#44
mgottscho
closed
2 weeks ago
1
A script to generate a filelist for any bazel target
#43
hamid-chipstack
closed
2 weeks ago
1
Use `BR_NOOP in br_asserts.svh
#42
mgottscho
closed
2 weeks ago
0
Implement br_fifo_flops
#41
mgottscho
closed
2 weeks ago
0
Make 'top' attr optional for verilog_elab_test and verilog_lint_test
#40
mgottscho
closed
2 weeks ago
0
Fix macros to pass lint when certain defines are not set
#39
mgottscho
closed
2 weeks ago
0
Implement br_fifo_ctrl_1r1w
#38
mgottscho
closed
2 weeks ago
0
Fix verible formatting bugs in macros
#37
mgottscho
closed
2 weeks ago
0
Add `defines` argument to `verilog_elab_test` and `verilog_lint_test`
#36
mgottscho
closed
2 weeks ago
0
Fix argument parsing bug in verilog_elab_test.py and verilog_lint_test.py
#35
mgottscho
closed
2 weeks ago
0
Add missing verible version to lint test github action
#34
mgottscho
closed
2 weeks ago
0
Use hermetic verible style lint and format hooks
#33
mgottscho
closed
2 weeks ago
0
Use hermetic buildifier precommit hook
#32
mgottscho
closed
2 weeks ago
0
Overhaul elab/lint tools to use env vars; replace verible style tests w/ pre-commit hooks
#31
mgottscho
closed
2 weeks ago
0
Implement `br_ram_flops_1r1w`
#30
mgottscho
closed
2 weeks ago
0
Clean up elab and lint rules; add formatters to pre-commit hooks
#29
mgottscho
closed
2 weeks ago
0
Implement verilog_lint_test
#28
mgottscho
closed
3 weeks ago
0
Refactor verilog bazel rules into a single verilog.bzl
#27
mgottscho
closed
3 weeks ago
0
Fully bzlmod
#26
mgottscho
closed
3 weeks ago
0
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