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YosysHQ
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apicula
Project Apicula 🐝: bitstream documentation for Gowin FPGAs
MIT License
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trouble running the example files for tang sipeed nano 20k
#278
sriram021
closed
1 hour ago
8
Implement the UserFlash primitives.
#277
yrabbit
opened
3 days ago
0
Use builtin USB-serial
#276
yrabbit
closed
5 days ago
0
Remove the magic numbers
#275
yrabbit
closed
6 days ago
0
BUGFIX. Fix dat offset.
#274
yrabbit
closed
1 week ago
0
Initial support for 5A series
#273
AwooOOoo
opened
1 week ago
0
Assign missing time delays
#272
yrabbit
closed
2 weeks ago
0
Gowin - tang nano 4K, 9K Yosys generated bitstreams cannot be programmed with Gowin EDA
#271
fedor-goncharov
closed
2 weeks ago
1
Add delays for primary clocks.
#270
yrabbit
closed
3 weeks ago
0
tangprimer20k: Design involving the clock doesn't run on hardware
#269
Mai-Lapyst
opened
3 weeks ago
5
MacOS, Qt5/QtOpenGL issue, no such file
#268
ReubenkThomas
opened
1 month ago
3
Are BRAMs supported?
#267
stacksmith
closed
1 month ago
3
Add wire class info
#266
yrabbit
closed
1 month ago
0
Fix bits to bytes conversion.
#265
yrabbit
closed
1 month ago
0
Tang Nano 9K -- silent failure via sram, CRC error via flash
#264
stacksmith
closed
1 month ago
2
HCLK. Primary clock pins
#263
yrabbit
closed
3 weeks ago
2
Tang Nano 9K bad checksum when flashing
#262
stacksmith
closed
2 weeks ago
42
Add DHCEN primitive.
#261
yrabbit
opened
1 month ago
3
Add dynamic clock control
#260
yrabbit
closed
3 weeks ago
4
Fix regex
#259
max-kudinov
closed
1 month ago
4
HCLK Support
#258
Seyviour
closed
3 weeks ago
4
Implement power saving primitive BANDGAP
#257
yrabbit
closed
1 month ago
0
Fix pROM(X9).
#256
yrabbit
closed
1 month ago
0
Clarification in the doc about BSRAM BLKSEL
#255
yrabbit
closed
2 months ago
0
BSRAM BLKSEL fix
#254
yrabbit
closed
2 months ago
0
Relax BSRAM initialization data requirements
#253
yrabbit
closed
2 months ago
0
BSRAM. Corrective action.
#252
yrabbit
closed
2 months ago
0
Describe the BSRAM regs in GW1NR-9C and GW2AR-18C
#251
yrabbit
closed
2 months ago
0
Fix IO unpack
#250
yrabbit
closed
2 months ago
0
Add description of BSRAM harness
#249
yrabbit
closed
2 months ago
0
Fix CI
#248
yrabbit
closed
3 months ago
0
BUGFIX. Fix BSRAM unpacking.
#247
yrabbit
closed
3 months ago
0
Doc. Brief notes on DSP operation
#246
yrabbit
closed
3 months ago
1
Notes about DSP
#245
yrabbit
closed
3 months ago
0
Tang Nano 9k: rPLL is not working at all
#244
tmssngr
closed
1 month ago
6
Cant find how to compile for tang nano 20k
#243
H4-b
closed
4 months ago
6
MULT36x36 not working, but MULT18x18 is working! - DSP Primitive
#242
bjoernskau
closed
4 months ago
2
Add PLL pads.
#241
yrabbit
closed
4 months ago
3
PLL unstable on tec0117
#240
pepijndevos
opened
5 months ago
1
Implement the DSP primitive.
#239
yrabbit
closed
5 months ago
3
update yosys CI branches
#238
pepijndevos
closed
5 months ago
1
Add Functions for Concise Tile Parsing
#237
Seyviour
closed
5 months ago
2
Add examples with tiny RISCV
#236
yrabbit
closed
5 months ago
0
Optimistic compression approach
#235
kimstik
opened
6 months ago
3
Examples. Describe the Tangnano4k clock pin.
#234
yrabbit
closed
6 months ago
2
Update workflows
#233
mmicko
closed
7 months ago
2
Failed to route net Gowin_rPLL_9Mhz.clkout with nextpnr-himbaechel
#232
mitnk
closed
7 months ago
11
Extend SDRAM Documentation to Cover GW2AR-18 Devices
#231
Seyviour
closed
7 months ago
17
Replace numpy arrays with lists.
#230
yrabbit
closed
6 months ago
6
bump yosys and nextpnr versions
#229
pepijndevos
closed
7 months ago
0
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