chipsalliance VeeRwolf issues

chipsalliance / VeeRwolf

FuseSoC-based SoC for VeeR EH1 and EL2

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issues

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can not access ICCM/DCCM memory with dmi_wrapper module

#76 alphijiang closed 2 weeks ago
1
Adding Wolf Pack to VeeRwolves branch

#75 gsinside closed 1 month ago
1
Fix bootrom

#74 MikaelStrom closed 1 month ago
1
Add target for an Intel Agilex 5 premium devkit.

#73 Gostas closed 1 month ago
1
Updating wb_intercon

#72 gsinside closed 1 month ago
2
Added support for Digilent Nexys Video.

#71 MikaelStrom closed 4 months ago
1
Fix comment for register addresses in syscon

#70 cdhmanning closed 7 months ago
1
Error in Build of Predefined examples of Zephyr

#69 minecraftdixit opened 8 months ago
1
May I ask how to generate the build. h file used for FPGA project？

#68 yaanng2022 opened 10 months ago
0
Assertion error when running fusesoc simulation

#67 MoonisAmir10 opened 1 year ago
6
rvfpga on Nexys video: Error: Timed out after 1s waiting for sbbusy to go low

#66 AmirhosseinR closed 1 year ago
1
Update Readme file with missing instructions

#65 SriQamcom closed 1 year ago
1
Changes to work with zephyr 2.7.4.

#64 anders-ahlberg closed 1 year ago
1
Error when building Zephyr example

#63 aleksaj-vtool opened 1 year ago
3
Unable to run Simulation using FuseSoC

#62 vignajeth closed 1 year ago
1
Compilation Errors while running SweRVolf

#61 vignajeth closed 1 year ago
1
SweRV EL2 with External Sram memory issue

#60 nimra471 closed 1 year ago
1
Read access stops when read/write access is repeated

#59 yafuru0 opened 1 year ago
2
Tested/Implemented on other cores

#58 geoalx opened 1 year ago
0
fusesoc run --target=arty_a7 swervolf

#57 nimra471 closed 1 year ago
1
simple_spi.v file not found in the repository

#56 Sesib closed 1 year ago
1
axi/wb bus cycle times

#55 jamesbbecker opened 2 years ago
7
Setup fails with error about cdc_utils

#54 paulcobb27 closed 2 years ago
3
Arty a7

#53 bl0x closed 2 years ago
4
Investigating cache performance with burst wrap reads

#52 jeras opened 2 years ago
0
fusesoc run --target=basys3 with vivado 2021.2

#51 kendallgreen opened 2 years ago
5
Linux Compatibility

#50 SOUMYADIPSAHA10 closed 2 years ago
0
Linux compatibility

#49 JOHNTBIJU closed 2 years ago
1
Which are the steps to run baremetal c routines?

#48 kuoyaoming93 closed 2 years ago
1
how to change the CPUs clock frequency

#47 kuoyaoming93 closed 2 years ago
2
[Nexys4 DDR] Struggling to load into ICCM (address 0xEE000000)

#46 mablinov opened 2 years ago
3
hello_uart.S: Fix symbol label to point to string

#45 mablinov closed 2 years ago
1
Running Compliance Test for Swerv

#44 YeuzhiHere closed 3 years ago
4
ERROR: [Labtools 27-3165] End of startup status: LOW when [ run --target=nexys_a7 --flag=cpu_el2 swervolf]

#43 nicolast0604 opened 3 years ago
0
openocd timeout occurs when trying to load elf file using command 'load_image'.

#42 nikhill-agnisys closed 3 years ago
2
fusesoc build and run using xcelium

#41 nikhill-agnisys closed 3 years ago
12
fusesoc run --target=sim swervolf with Verilator=3.918

#40 nicolast0604 opened 3 years ago
2
fusesoc run --target=nexys_a7 swervolf with Vivado 2020.1

#39 nicolast0604 opened 3 years ago
2
fusesoc run --target=sim swervolf with verilator 4.104

#38 nicolast0604 closed 3 years ago
2
Do you have any plan to support SweRV-EH2.

#37 nicolast0604 opened 3 years ago
1
LItedram Generation

#36 lindajames101 closed 3 years ago
3
Boot Switches table error

#35 ddandare closed 3 years ago
1
README: Point to the Tock port

#34 alistair23 closed 3 years ago
3
Dectect unsupported features in core description files

#33 olofk closed 3 years ago
0
Verilator compilation fail due to "common_cells/registers.vh" not found

#32 tomverbeure closed 3 years ago
8
Fusesoc Simulation Error

#31 mhamzaali opened 3 years ago
1
Swerv configuration & Swervolf

#30 agrobman opened 3 years ago
0
bscan_tap module - how does it work?

#29 agrobman opened 3 years ago
21
Do you have a plan to support SweRV-EL2 ?

#28 kidonglee closed 5 months ago
4
Add missing "expose_csrs" command to OpenOCD .cfg files

#27 JanMatCodasip closed 3 years ago
0