chipsalliance f4pga-v2x issues

chipsalliance / f4pga-v2x

Tool for converting specialized annotated Verilog models into XML needed for Verilog to Routing flow.

https://f4pga-v2x.readthedocs.io/en/latest/

Apache License 2.0

10 stars 12 forks source link

issues

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Remove usage of `distutils`

#119 Liamolucko opened 3 months ago
0
docstrings in the code not published in the documentation

#118 mithro opened 2 years ago
0
ReadTheDocs page not linking to GitHub repository

#117 mithro opened 2 years ago
4
Problem of setup v2x

#116 AyaseErii opened 2 years ago
0
docs: theme s/SymbiFlow/F4PGA/

#115 umarcor closed 2 years ago
0
Why v2x don't support routing mux which has output bus?

#114 KKtiandao closed 2 years ago
4
When the file is in the current path, an error will be reported.

#113 liibin closed 2 years ago
0
docs: conf cleanup; add logo and favicon

#112 umarcor closed 2 years ago
0
🔄 Synced file(s) with SymbiFlow/symbiflow-common-config

#111 common-config-bot opened 2 years ago
0
Relicense to Apache-2.0

#110 kgugala closed 2 years ago
0
Code format

#109 kgugala closed 2 years ago
0
env: use yosys instead of symbiflow-yosys

#108 acomodi closed 2 years ago
0
Questions regarding the purpose and function of v2x

#107 MidsummerNight opened 3 years ago
0
Transition to use make-env

#106 acomodi closed 3 years ago
0
Persistent errors about vtr-xml-utils when attempting to install python-symbiflow-v2x

#105 MidsummerNight closed 3 years ago
3
Change to new theme

#104 daniellimws closed 3 years ago
0
Add license checking github action

#103 daniellimws closed 3 years ago
0
Add license checking github action

#102 mithro closed 3 years ago
1
WIP: Automated pack patterns

#101 acomodi opened 3 years ago
6
Surelog package generate conflicts

#100 acomodi opened 3 years ago
0
Fasm annotation support rebased

#99 acomodi opened 3 years ago
1
license: fix ISC license header for some scripts

#98 acomodi closed 3 years ago
0
ci: use symbiflow/actions/checks@main

#97 umarcor closed 3 years ago
0
Move CI logic out of yaml.

#96 litghost closed 3 years ago
0
Fix setup.py requirements.

#95 litghost closed 3 years ago
0
Convert travis to GitHub Actions

#94 mithro closed 3 years ago
0
Clean up and update dependency specifications

#93 mithro closed 3 years ago
3
Small documentation fixes to the README.rst file

#92 mithro closed 3 years ago
0
FF with clock enable and syncronous set/reset does not work

#91 litghost opened 3 years ago
3
RTD link on README is broken

#90 litghost closed 3 years ago
0
Rework pack pattern annotation generation

#89 mithro opened 3 years ago
4
Fix for pack_pattern annotation

#88 rw1nkler closed 3 years ago
1
Relaxed restriction for uppercase BLIF model names

#87 rw1nkler closed 4 years ago
3
Make V2X code docstrings apprear in the generated documentation

#86 mkurc-ant opened 4 years ago
0
Pack pattern specification behaves incorrectly

#85 mkurc-ant opened 4 years ago
11
muxes: add name of routing mux as metadata prefix

#84 acomodi closed 4 years ago
0
Handling parameterized modules

#83 mkurc-ant opened 4 years ago
0
Handling whiteboxes with modes

#82 mkurc-ant opened 4 years ago
2
Figure out why Symbolator images have white background

#81 mithro opened 4 years ago
0
Investigate if we can use yowasp for Yosys?

#80 mithro opened 4 years ago
2
Incorrect Yosys package installed in readthedocs env

#79 mkurc-ant opened 4 years ago
0
Complete docs

#78 mkurc-ant closed 4 years ago
16
pb_type: fix addition of blif model to muxes

#77 acomodi closed 4 years ago
1
CI fixes

#76 mkurc-ant closed 4 years ago
0
Allow specification of multiple pack patterns

#75 mkurc-ant opened 4 years ago
6
Support for clock buffer/mux modeling

#74 mkurc-ant closed 4 years ago
10
Yosys selection fix

#73 mkurc-ant closed 4 years ago
13
CI failures for Python <3.6

#72 mkurc-ant closed 4 years ago
4
docs: Show all READMEs from the tests in the docs

#71 daniellimws closed 4 years ago
8
DSP and Verilog to Routing pages are broken

#70 mithro opened 4 years ago
2