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pascalkuthe
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OpenVAF
An innovative Verilog-A compiler
https://openvaf.semimod.de/
GNU General Public License v3.0
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String parameters in OpenVAF
#74
arpadbuermen
closed
1 year ago
6
fixup serialization format
#72
pascalkuthe
closed
1 year ago
0
@pascalkuthe add command to dump vae like IR
#71
pascalkuthe
closed
1 year ago
0
model examples
#70
joamatab
closed
8 months ago
1
AST (Abstract Syntax Tree) from OpenVAF
#68
EktaBhaskar
closed
1 year ago
1
Prepare for release 23.5.0
#67
pascalkuthe
closed
1 year ago
2
Compiler paniking when access the current through a port
#66
medwatt
closed
1 year ago
3
Support hidden state variables
#65
medwatt
opened
1 year ago
3
improve $mfactor description
#64
pascalkuthe
closed
1 year ago
0
migrate from bors to circleci approval jobs
#63
pascalkuthe
closed
1 year ago
0
Improved aliasparam support
#62
pascalkuthe
closed
1 year ago
2
Add support for module instantiation
#61
medwatt
opened
1 year ago
1
fixing typos in comments and error messages
#60
gjcoram
closed
2 months ago
4
fix incorrect paramgiven flags when setting instance params for the model
#59
pascalkuthe
closed
1 year ago
2
Request for implementing $discontinuity
#58
arpadbuermen
opened
1 year ago
0
fix idt operator
#57
pascalkuthe
closed
1 year ago
2
export osdi_log symbol on windows
#56
pascalkuthe
closed
1 year ago
2
Verilog-A idt operator supported?
#55
EternalXY
closed
1 year ago
3
Module attributes
#54
dwarning
opened
1 year ago
2
Better error
#53
metroid120
closed
1 year ago
4
panic and implicite
#52
dwarning
closed
1 year ago
1
Question of "Linker not found".
#51
SeaFalling
closed
1 year ago
3
Recording output variables during transient simulation
#50
bertgoz
closed
1 year ago
3
bus definition
#49
kdotom
opened
1 year ago
1
do not check port direction at contribute/probe
#48
pascalkuthe
closed
1 year ago
4
Fix crashes in untested VA features
#47
pascalkuthe
closed
1 year ago
4
default parameter types
#46
KenKundert
closed
1 year ago
1
the parser seems stuck
#45
KenKundert
closed
1 year ago
2
VerilogAE for Windows
#44
miesli
opened
1 year ago
1
Support analog initial blocks
#43
pascalkuthe
closed
1 year ago
4
paramset support
#42
KenKundert
opened
1 year ago
6
analog initial
#41
KenKundert
closed
1 year ago
1
port directions should be optional
#40
KenKundert
closed
1 year ago
10
$display() causes a segmentation fault when invoked on windows
#39
bertgoz
closed
1 year ago
8
Hisim Compilation
#38
metroid120
closed
1 year ago
3
$limit(access_function_reference) fails
#37
dwarning
opened
1 year ago
2
Obsolete warning
#36
dwarning
opened
1 year ago
0
link error on win10
#35
dwarning
closed
1 year ago
7
Release 23.2.0
#34
pascalkuthe
closed
1 year ago
2
Prepare for 23.02.0 release
#33
pascalkuthe
closed
1 year ago
4
thread main panicked
#32
dwarning
closed
1 year ago
2
Noise contribution distorbs DC model
#30
dwarning
closed
1 year ago
1
fix nieche crashes
#29
pascalkuthe
closed
1 year ago
4
OpenVAF cannot compile dc source example
#28
ra3xdh
closed
1 year ago
1
Not valid parameter should give a warning
#27
dwarning
closed
1 year ago
2
VerilogAE docs
#26
metroid120
opened
1 year ago
0
cargo build error on actual git master
#25
dwarning
closed
1 year ago
1
fix various small issues
#24
pascalkuthe
closed
1 year ago
2
OSDI/OpenVAF: Verilog-A compact models in ngspice
#23
pascalkuthe
closed
1 year ago
0
Add links to documentation and website
#21
orgarten
closed
1 year ago
1
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