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OpenXiangShan
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XiangShan
Open-source high-performance RISC-V processor
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vsetvl: fix flush and block signal modified by vstart check
#3124
Ziyue-Zhang
opened
3 hours ago
0
./build/emu
#3123
mlabaf2
opened
7 hours ago
2
IPrefetch: MSHR should update IPrefetch s1 waymask
#3122
ngc7331
opened
2 days ago
1
L2TLB, RVH: change ppnlen from 24 to 29 for the first stage translation in two stage translation
#3121
pxk27
closed
8 hours ago
1
IssueQueue: change othersTransPolicy when allComp or allSimp for fix timing
#3120
xiaofeibao-xjtu
opened
3 days ago
1
StoreQueue: fix exception entry mistakenly written to sbuffer
#3119
good-circle
closed
8 hours ago
1
build: bump chisel 3.6.1, scala 2.13.14, mill 0.11.8, etc.
#3118
Tang-Haojin
closed
2 days ago
1
VFMA: fix bug of allFFlagsEn
#3117
xiaofeibao-xjtu
closed
3 days ago
1
Vfalu: fix ffagsEn logic for vfredunction
#3116
lewislzh
closed
7 hours ago
1
make: generate seperated sv instead of aggregated verilog
#3115
Tang-Haojin
opened
3 days ago
5
Backend,Frontend: pass flag of FtqPtr to TargetMem to avoid read out-of-date pred target
#3114
Lemover
opened
4 days ago
2
StoreUnit: fix bug when `lsq_replenish` of s2 fails to redirect
#3113
linjuanZ
closed
3 days ago
1
LLPTW, RVH: fix the wrong calculation of gpaddr that makes hpaddr become x signal
#3112
pxk27
closed
4 days ago
0
rv64v: fix exception check for vmvnr instructions
#3111
Ziyue-Zhang
closed
3 days ago
1
DCache: Remove redundant nack_data from mq_nack
#3110
bosscharlie
closed
3 days ago
1
vstart: support vstart value update and handle vstart exception
#3109
Ziyue-Zhang
closed
3 days ago
1
VSegmentUnit: refactor control signal assignment
#3108
weidingliu
closed
3 days ago
1
rv64v: fix rfWen signal when writing x0 for vector instructions
#3107
Ziyue-Zhang
closed
4 days ago
2
Backend fix timing
#3106
xiaofeibao-xjtu
closed
4 days ago
1
Backend: remove loadCancel from dispatch2iq to enqEntry for fix timing
#3105
xiaofeibao-xjtu
closed
4 days ago
1
refactor: change exception encoding from one-hot to label in order to…
#3104
Yan-Muzi
closed
3 days ago
1
IFU: cut the number of PC registers
#3103
my-mayfly
opened
5 days ago
1
bump yunsuan
#3102
sinceforYy
closed
5 days ago
1
rv64v: fix imm read and vtype update after flush pipe
#3101
Ziyue-Zhang
closed
6 days ago
1
VFALU: fix vfredunction fflags
#3100
lewislzh
closed
6 days ago
1
VLSU: Fix vector exception handling and fix bug for SegmentUnit.
#3099
Anzooooo
closed
5 days ago
3
Update Snapshot.scala
#3098
Jeremy-Jia
opened
1 week ago
0
bump coupledL2
#3097
Tang-Haojin
closed
6 days ago
1
PTW, RVH: fix the bug that the last second stage translation continues after the first stage translation raises af
#3096
pxk27
closed
1 week ago
1
package: change hypervior load's fuOpType
#3095
weidingliu
closed
1 week ago
1
Fix timing of memblock
#3094
good-circle
opened
1 week ago
1
MMU: test refactor page table walker level
#3093
good-circle
opened
1 week ago
1
bpu: disable ittage when no indirect branch & ittage backward shift
#3092
sleep-zzz
closed
3 days ago
3
rv64v: fix some vector bugs in uop split and handle illegal vector instruction
#3091
Ziyue-Zhang
closed
1 week ago
3
StoreQueue: sq entries with exception can deq without allvalid
#3090
good-circle
closed
1 week ago
1
Og2ForVector: fix ImmInfo of vector Exus, it should delay 1 cycle in og2
#3089
sinsanction
closed
1 week ago
1
Entries: optimize timing of mem IQs' response signals
#3088
sinsanction
closed
1 week ago
1
diff: add AlwaysBasicDiff on load event
#3087
xiaokamikami
closed
1 week ago
1
fix: multiple load replays lead to running out of FTQ entries
#3086
Yan-Muzi
closed
1 week ago
1
Backend: fix Uncertain Layency Fu's clock gate
#3085
sinceforYy
closed
1 week ago
1
In VCS simulation, multi-core simulation of some harts ended prematurely due to incorrect execution of SEQZ instruction
#3084
meiqin0
opened
1 week ago
1
BypassNetwork: ExuOH->ExuVec, add mask for forwardOrBypassValidVec3
#3083
xiaofeibao-xjtu
closed
1 week ago
1
VLSU: fix bug related to new VLSU
#3082
Anzooooo
closed
1 week ago
2
ci: use PGO for nightly regression
#3081
cyyself
closed
2 weeks ago
1
CI: enable PGO when building emu for CI
#3080
cyyself
closed
2 weeks ago
1
ICache: Init registers to prevent x-state
#3079
ngc7331
closed
2 weeks ago
0
HPTW, RVH: fix the bug that non-leaf and level >= 2 pte doesn't raise pagefault.
#3078
pxk27
closed
2 weeks ago
6
PageTableCache, RVH: fix the error fence when sfence_vma or hfence_gvma is executed
#3077
pxk27
closed
2 weeks ago
1
DCache: Fix x-prop caused by l2_error
#3075
bosscharlie
closed
1 week ago
2
ci: use 16 threads for emu-basics
#3074
Tang-Haojin
closed
2 weeks ago
1
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