issues
search
riscv
/
riscv-fast-interrupt
Proposal for a RISC-V Core-Local Interrupt Controller (CLIC)
https://jira.riscv.org/browse/RVG-63
Creative Commons Attribution 4.0 International
237
stars
49
forks
source link
issues
Newest
Newest
Most commented
Recently updated
Oldest
Least commented
Least recently updated
change access to clic registers from memory mapped to indirect CSR
#364
dansmathers
closed
6 months ago
6
pseudo-code update of mret with inhv
#363
dansmathers
closed
11 months ago
1
cleanup NUM_INTERRUPT in parameters section
#362
dansmathers
closed
11 months ago
0
CLICINTCTLBITS significance
#361
wizflame
closed
11 months ago
2
Smstateen bit
#360
JamesKenneyImperas
closed
7 months ago
4
value of sintthresh when mret is called
#359
wizflame
closed
11 months ago
1
Side effects of executing mret with mcause.minhv==1
#358
silabs-oysteink
closed
11 months ago
7
Wrong indentation?
#357
silabs-robin
closed
11 months ago
1
Clearing of xinhv after a successful xRET
#356
eroom1966
closed
11 months ago
0
Is there a specification for mnstatus.mpp and mnstatus.mpie?
#355
JamesKenneyImperas
closed
11 months ago
4
fix exception_handler pseudocode
#354
dansmathers
closed
11 months ago
2
clarify which privilege modes will have mscratchcsw
#353
dansmathers
closed
1 year ago
0
Clarify/Fix Smclic Ssclic Suclic memory map reserved areas
#352
dansmathers
closed
1 year ago
0
Reserved ranges in memory mapped registers
#351
christian-herber-nxp
closed
1 year ago
1
Existence of mscratchcsw on a machine mode only CPU?
#350
Silabs-ArjanB
closed
1 year ago
1
Moving CLIC memory mapped registers to indirect CSRs
#349
christian-herber-nxp
closed
1 week ago
16
xcause.inhv conflicts with enabling CLIC per mode
#348
JamesKenneyImperas
opened
1 year ago
2
exception_handler pseudocode needs checking
#347
JamesKenneyImperas
closed
11 months ago
0
adding Smstateen extension text to s-mode clic CSRs
#346
dansmathers
closed
1 year ago
0
stateen register required to block access to new ssclic CSRs?
#345
dansmathers
closed
1 year ago
1
add csrrs mnxti behavior
#344
dansmathers
closed
9 months ago
0
add CSRRW option for xnxti CSR
#343
dansmathers
closed
1 year ago
2
add mtvec submode for switching between vectored handlers
#342
dansmathers
closed
1 year ago
1
inhv definition change
#341
dansmathers
closed
1 year ago
0
updating mcause.pil and xret behavior to better match wording in priv…
#340
dansmathers
closed
1 year ago
0
xcause.xpil and xpie behavior on trap taken and xRET
#339
hwliu-tommy
closed
1 year ago
4
Update clic.adoc
#338
WWeiying
closed
1 year ago
1
Update clic.adoc
#337
WWeiying
closed
1 year ago
0
text update for question 1 of issue #334
#336
dansmathers
closed
1 year ago
0
Update clic.adoc
#335
WWeiying
closed
1 year ago
0
Automatically clear xintthresh.th
#334
hwliu-tommy
closed
1 year ago
2
Question about xinhv
#333
hwliu-tommy
closed
1 year ago
10
should xintthresh be initialized to 0?
#332
dansmathers
closed
1 year ago
2
attempt at cleaning up CLIC parameter definitions
#331
dansmathers
closed
7 months ago
3
pull for issue #322 cleanup xnlbits text
#330
dansmathers
closed
1 year ago
0
Add optional support for hardware register save e.g. shadow register sets?
#329
brucehoult
opened
1 year ago
3
RMNI text clarification for issue #320
#328
dansmathers
closed
1 year ago
1
intthresh clearing text update for issue #321
#327
dansmathers
closed
1 year ago
0
added note for issue #317
#326
dansmathers
closed
1 year ago
0
note for issue #308
#325
dansmathers
closed
7 months ago
1
pull for #318 - use "zero" instead of x0 in assembly examples
#324
dansmathers
closed
1 year ago
0
pull for issue #290 non-naturally aligned access to the trap vector t…
#323
dansmathers
closed
1 year ago
0
Clean up section 9.1.1. (xcliccfg registers)
#322
JamesKenneyImperas
closed
1 year ago
1
Clearing xintthresh when fewer than 8 threshold bits are implemented
#321
JamesKenneyImperas
closed
1 year ago
2
clarify interaction of CLIC with RNMI
#320
JamesKenneyImperas
closed
1 year ago
2
MNRET and mintthresh
#319
JamesKenneyImperas
closed
1 year ago
1
Consistently use ABI names for registers
#318
christian-herber-nxp
closed
1 year ago
1
Clarification on trampoline examples and callee-save expectation for non-x registers
#317
christian-herber-nxp
closed
1 year ago
2
update for issue #311 - nlbits
#316
dansmathers
closed
1 year ago
0
Typos in preemptible horizontal interrupt handler
#315
christian-herber-nxp
closed
1 year ago
1
Previous
Next