sylefeb Silice issues - Githubissues

sylefeb / Silice

Silice is an easy-to-learn, powerful hardware description language, that simplifies designing hardware algorithms with parallelism and pipelines.

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Use install(PROGRAMS ...) to install Python scripts with correct permissions.

#273 resistor closed 4 months ago
2
Fix incorrect framework path in silice-make.py

#272 resistor closed 4 months ago
2
silice-make.py fails on initial test after install on MacOS

#271 resistor closed 4 months ago
3
Unable to build just the ice-v CPU

#270 MrJake222 opened 5 months ago
3
Enhancement of declaration of and usage of always assignments

#269 rob-ng15 opened 7 months ago
0
$$ directives in board file Verilog are not ignored in code disabled by preprocessor test or /* */

#268 FPGAEveryday opened 7 months ago
0
Enhancement of declaration of bram/brom/simple_dualport_bram/dualport_bram

#267 rob-ng15 opened 7 months ago
0
Add support for colorlight i9 board

#266 davidar closed 6 months ago
1
initial support for tang nano 20k

#265 conversy closed 9 months ago
3
Update GetStarted_macOS.md to latest brew package names

#264 conversy closed 10 months ago
0
Documentation: possible typo in Silice/learn-silice/Documentation.md?

#263 conversy opened 10 months ago
0
Typos in learn-silice/Documentation

#262 conversy closed 10 months ago
0
Fix some typos in tutorial README.md

#261 conversy closed 10 months ago
0
Fix typo in comment on -> one

#260 conversy closed 10 months ago
1
Fix link to streaming audio project

#259 conversy closed 10 months ago
2
inouts cannot be bound using a bit-select syntax

#258 sylefeb opened 10 months ago
0
**ASSERT FAILED** (if_deadend && !if_statless) || !if_deadend, file ..Algorithm.cpp, line 4078

#257 tommythorn closed 10 months ago
3
ULX3S sdram_memtest sample build fails.

#256 gkankanh closed 1 year ago
4
Can't compile Silice on Arch Linux

#255 Popolon opened 1 year ago
14
uart_tx and uart_rx seem to have wrong direction in the Verilog framework file for the ECPIX5-Board

#254 at91rm9200 opened 1 year ago
1
Not setting a subroutines output parameter leads to a yosys error.

#253 at91rm9200 closed 1 year ago
2
A subroutine which is never called in a design can crash Silice.

#252 at91rm9200 closed 9 months ago
6
Error initialising bram not brom

#251 rob-ng15 opened 1 year ago
0
Name shadowing

#250 sylefeb opened 1 year ago
0
Unexpected code execution.

#249 at91rm9200 closed 1 year ago
4
Unused states that remain and cycles that could be avoided

#248 sylefeb opened 1 year ago
35
Empty FSM states could be optimized

#247 suarezvictor opened 1 year ago
7
Many boards share a common set of features, yet each board has its own define

#246 sylefeb opened 1 year ago
2
Initial files for ULX4M-LS board

#245 goran-mahovlic closed 1 year ago
1
Combining declaration and always assignment

#244 rob-ng15 opened 1 year ago
0
Extracting bits from a bitfield results in a segmentation fault

#243 rob-ng15 closed 1 year ago
2
interleaving pipelined algorithms in host pipelines

#242 sylefeb opened 1 year ago
1
pipeline sync

#241 sylefeb opened 1 year ago
0
Silice installs files back into the build directory

#240 yurivict closed 10 months ago
3
Get opengl demos to build and on macs.

#239 torkos closed 1 year ago
1
Double check initializers for tables

#238 sylefeb closed 2 years ago
1
Combinational loops may be wrongly detected when passing entire groups as parameters

#237 sylefeb opened 2 years ago
0
typo fixes

#236 aaronferrucci closed 2 years ago
1
Expression trackers in algorithms body lead to confusing (albeit correct) semantics

#235 sylefeb opened 2 years ago
0
commit 477301ae regressed my code with obscure error message

#234 tommythorn opened 2 years ago
6
Recursive algorithm support?

#233 ColonelPhantom opened 2 years ago
2
Possible preprocessor problem.

#232 at91rm9200 closed 2 years ago
3
Update to use clock0 and clock1 dualport_bram_wmask_byte.v.in

#231 rob-ng15 closed 2 years ago
1
Updates for ULX3S and dualport_bram_wmask_byte support

#230 rob-ng15 closed 2 years ago
2
Missing template, dualport bram with byte masking

#229 rob-ng15 closed 2 years ago
1
Cannot declare BRAM in algorithm blocks, fails silently

#228 sylefeb closed 2 years ago
0
Export / import

#227 sylefeb opened 2 years ago
0
Versioning

#226 sylefeb opened 2 years ago
1
Silice terminates without error message, if a subroutine contains two output parameters.

#225 at91rm9200 closed 2 years ago
3
Add missing <list> header.

#224 cbalint13 closed 2 years ago
1