jerralph riscv-vip issues

jerralph / riscv-vip

For pre-silicon developers of RISC-V systems, riscv-vip is a SystemVerilog project that helps with pre-si verification and debug

Apache License 2.0

53 stars 30 forks source link

issues

Newest

Newest Most commented Recently updated Oldest Least commented Least recently updated

Validate all-uvm-dev with scr1 demo before merging to master

#25 jerralph opened 5 years ago
0
Flatten the src/uvm/sv_to_uvm directory tree

#24 jerralph opened 5 years ago
0
Remove deprecated files from all-uvm-dev branch

#23 jerralph opened 5 years ago
0
Create a unit test for inst32_jformat UVM object

#22 jerralph closed 5 years ago
1
Create a unit test for inst32_uformat UVM object

#21 jerralph closed 5 years ago
2
Create a unit test for inst32_bformat UVM object

#20 jerralph opened 5 years ago
0
Create a unit test for inst32_rformat UVM object

#19 jerralph opened 5 years ago
0
Create a unit test for inst32_iformat UVM object

#18 jerralph closed 5 years ago
2
Create a unit test for inst32_sformat UVM object

#17 jerralph closed 5 years ago
3
Create a unit test for inst32 UVM object

#16 jerralph opened 5 years ago
0
Unit test the rs1/rs2 bins cgs.

#15 jerralph opened 5 years ago
1
Remove UNKNOWN instruction from some crosses

#14 jerralph opened 5 years ago
0
SV-to-UVM Porting

#13 muneebullashariff closed 5 years ago
2
Update inst_history to be per core in uvm env

#12 jerralph opened 5 years ago
3
Display the cycle count for instructions

#11 jerralph closed 5 years ago
2
Whitebox register file and associate register values with instructions

#10 jerralph closed 5 years ago
2
associate branch/jump addresses with associated instruction after completion

#9 jerralph opened 5 years ago
0
Associate rd values for completed instructions

#8 jerralph closed 5 years ago
1
to_string() layout for CSR instructions is not correct

#7 jerralph opened 5 years ago
0
fix vcs compiling errors

#6 kencycheng closed 5 years ago
1
Compile errors in VCS

#5 kencycheng closed 5 years ago
4
inst_ut: fix for #3 - build issue with Riviera

#4 rhotchki closed 6 years ago
1
Error

#3 alvinkallely closed 6 years ago
3
Change the instruction coverage to be per-instance

#2 jerralph opened 6 years ago
0
Decide if the whole project should be converted to UVM

#1 jerralph closed 5 years ago
1