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riscv-non-isa
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riscv-trace-spec
RISC-V Processor Trace Specification
https://jira.riscv.org/browse/RVG-88
Creative Commons Attribution 4.0 International
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Should delta address field be added a sign bit at MSB?
#136
zhangdujiao
closed
3 days ago
1
Does the tval comparison require itype = 1 or 2?
#135
zhangdujiao
closed
2 hours ago
7
Format 2 irreport/irdepth when stopping trace
#134
pdonahue-ventana
opened
1 week ago
1
The field width of branch_map in format 1
#133
zhangdujiao
closed
2 weeks ago
1
Should each ingress port signal group match separated comparators and filter?
#132
zhangdujiao
closed
1 week ago
3
Trace mode configuration
#131
zhangdujiao
closed
3 weeks ago
5
Correct typos in ingressPort.adoc
#130
wissygh
closed
4 weeks ago
0
Fix the citation to table `context-type` in ingressPort.adoc
#129
wissygh
closed
1 month ago
0
Target address configuration for trace payload in TE
#128
zhangdujiao
closed
1 month ago
7
Definition of exc_only in figure 9.1 is different from explanation above
#127
zhangdujiao
closed
1 month ago
2
Why syncs-start packet is issued after two consecutive exceptions/interruptions?
#126
zhangdujiao
closed
1 month ago
3
Counter start condition of resynchronisation timer
#125
zhangdujiao
closed
1 month ago
6
1st qualified definition
#124
zhangdujiao
closed
3 weeks ago
14
121 qual status value missing of format 3 subformat 3 in v203 version
#123
wmat
closed
1 month ago
3
What is the qual_status value at qualified 0->1 condition
#122
zhangdujiao
closed
1 month ago
1
qual_status value missing of Format 3 subformat 3 in v2.0.3 version
#121
zhangdujiao
closed
1 month ago
1
32 bits width of branch_count field in format 0, subformat 0
#120
zhangdujiao
closed
1 month ago
4
Encoder reference python script generatedm 3 TRAPs on 2 exception events
#119
yandumchin
opened
2 months ago
3
Are there any recommended value of call_counter_size_p, return_stack_size_p, bpred_size_p and cache_size_p?
#118
zhangdujiao
closed
2 months ago
1
Poor Variable Choice
#117
IainCRobertson
opened
2 months ago
0
The difference between encoder_mode and ioptions fileds in Format 3 subformat 3 - Support
#116
zhangdujiao
closed
2 months ago
2
Trace trigger hit when triggers with other action also fire
#115
AoteJin
opened
2 months ago
10
Payload size is limited in 31bytes (248bit), witch is not enough for Format 3 subformat 1 - Trap
#114
zhangdujiao
closed
2 months ago
10
te_inst: format 3, subformat0 condistion: resync counter > max_resync, in Chapter 9
#113
zhangdujiao
closed
2 months ago
1
There is no SRCID filed in ATB Encapsulation
#112
zhangdujiao
closed
2 months ago
5
Relationship between time field in packet and optional 16bit timestamp in ATB encapsulation
#111
zhangdujiao
closed
2 months ago
4
"iaddress_width_p - iaddress_lsb_p": the width of Delta address and Full address
#110
zhangdujiao
closed
3 months ago
4
How to understand exc_only and er_n in Chapter 9
#109
zhangdujiao
closed
3 months ago
4
Does the Encoder treat itype=14 and 15 the same as itype=10 and 11?
#108
zhangdujiao
closed
3 months ago
2
Whether itype=12 is regarded as a call for Encoder
#107
zhangdujiao
closed
3 months ago
1
How to define the newest valid group for R type signal
#106
zhangdujiao
closed
3 months ago
4
sec_check optional sideband signal mentioned in RISC-V External Debug Security Extension
#105
zhangdujiao
closed
3 months ago
2
What is the reset time of branch_map and pbc in branch prediction mode
#104
zhangdujiao
closed
3 months ago
2
The specific implementation principle of the implicit return mode
#103
zhangdujiao
opened
4 months ago
0
The discovery related register in <RISC-V Trace Control Interface Specification>
#102
zhangdujiao
closed
3 months ago
1
Formatting fixes
#101
wmat
closed
4 months ago
10
format error in newest E-Trace spec
#100
zhangdujiao
closed
4 months ago
9
Make priority of trace-on and trace-off explicit
#99
IainCRobertson
opened
4 months ago
0
A vector of sideband signals to inform the trace output being stopped
#98
AoteJin
opened
4 months ago
4
Synchronization packets for privilege change
#97
AoteJin
opened
4 months ago
0
Which instruction should be reported when trigger's timing = 0/1.
#96
vang2333
opened
5 months ago
0
Update readme
#95
wmat
closed
5 months ago
0
Bump version to 2.0.2 for first AsciiDoc version.
#94
wmat
closed
5 months ago
2
Section 7.6.2 description
#93
pdonahue-ventana
opened
7 months ago
3
How to handle cm_popret while decoding?
#92
summorey22
closed
5 months ago
3
Move spec to AsciiDoc
#91
wmat
closed
5 months ago
6
Fix decoder omission highlighted by issue #89
#90
IainCRobertson
closed
7 months ago
1
After mret/sret retires, the privilege mode is switched at the same time, but pc missing situation occurs in a scene (details are described below).
#89
ZeyueShen
closed
7 months ago
4
Final updates for front page of 2.0.1
#88
IainCRobertson
closed
8 months ago
2
Addresses written on 64 bits in Reference Flow
#87
bshveida
closed
7 months ago
1
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